module pcie_dma_wrapper (
    input  logic                    clk,
    input  logic                    rst,

    taxi_axis_if.src                m_axis_rq,
    taxi_axis_if.snk                s_axis_rc,

    taxi_apb_if.slv                 s_apb
);

logic [5:0] seq_num_0;
logic seq_num_valid_0;

logic [5:0] seq_num_1;
logic seq_num_valid_1;


taxi_dma_if_pcie_us #(

) u_taxi_dma_if_pcie_us (
    .clk                            (clk),
    .rst                            (rst),

    .m_axis_rq                      (m_axis_rq),
    .m_axis_rc                      (m_axis_rc),

    .s_axis_rq_seq_num_0            (seq_num_0),
    .s_axis_rq_seq_num_valid_0      (seq_num_valid_0),
    .s_axis_rq_seq_num_1            (seq_num_1),
    .s_axis_rq_seq_num_valid_1      (seq_num_valid_1),

    .pcie_tx_fc_nph_av              ('0),
    .pcie_tx_fc_ph_av               ('0),
    .pcie_tx_fc_pd_av               ('0),
);

endmodule