Use 125MHz axi clock, 250 doesn't pass timing

2025-01-26 22:52:55 -08:00
parent f6d5002273
commit 1099b4ffdd
4 changed files with 15 additions and 7 deletions
--- a/artix_pcie.yaml
+++ b/artix_pcie.yaml
@@ -5,4 +5,12 @@ device_info:

 design_info:
  sources: "sources.list"
-  top_module: "artix_pcie"
+  top_module: "artix_pcie"
+
+synthesis_options:
+  synth_directive: "PerformanceOptimized"
+  opt_directive: "Explore"
+
+pnr_options:
+  place_directive: "Explore"
+  route_directive: "AggressiveExplore"