Use 125MHz axi clock, 250 doesn't pass timing

2025-01-26 22:52:55 -08:00
parent f6d5002273
commit 1099b4ffdd
4 changed files with 15 additions and 7 deletions
--- a/requirements.txt
+++ b/requirements.txt
@@ -1,9 +1,8 @@
-i https://git.byronlathi.com/api/v4/projects/95/packages/pypi/simple
 scapy
 cocotb
 cocotbext-axi
 cocotbext-eth
 rtl-manifest
-build_fpga>=0.3.1
+build_fpga>=0.3.2
 fpga-sim>=0.1.0
 peakrdl