bslathi19/artix_pcie
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Change speed grade here too

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Byron Lathi
2025-01-26 19:10:26 -08:00
parent 37a408d1b5
commit 3ab2925bf3
2 changed files with 2 additions and 2 deletions
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2
artix_pcie.yaml
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@@ -1,7 +1,7 @@
tool: "vivado" tool: "vivado"
device_info: device_info:
device: "xc7a200tfbg484-1" device: "xc7a200tfbg484-2"
design_info: design_info:
sources: "sources.list" sources: "sources.list"

2
ip/axis_data_fifo_0/axis_data_fifo_0.xci
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@@ -60,7 +60,7 @@
"PREFHDL": [ { "value": "VERILOG" } ], "PREFHDL": [ { "value": "VERILOG" } ],
"SILICON_REVISION": [ { "value": "" } ], "SILICON_REVISION": [ { "value": "" } ],
"SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ],
"SPEEDGRADE": [ { "value": "-1" } ], "SPEEDGRADE": [ { "value": "-2" } ],
"STATIC_POWER": [ { "value": "" } ], "STATIC_POWER": [ { "value": "" } ],
"TEMPERATURE_GRADE": [ { "value": "" } ] "TEMPERATURE_GRADE": [ { "value": "" } ]
}, },