CPU Simulator

We should be able to run at least a semblance of production code in simulation. This code should be written in C however. Since we can't/don't want to simulate the CPU in verilog, can we write a RISC-V simulator in python? It won't be cycle accurate but that is not super important. the CPU is pipelined so we can just treat it like a sincle cycle CPU and just ignore that the instruction latency will be lower.