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toolchain/external: bump Linaro ARMeb to 2016.05 for i686 hosts

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Signed-off-by: Romain Naour <romain.naour@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
This commit is contained in:
Romain Naour
2016-10-11 23:04:58 +02:00
committed by Thomas Petazzoni
parent 3411db085d
commit 9c9ddc4a2c
3 changed files with 5 additions and 34 deletions
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27
toolchain/toolchain-external/Config.in
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@@ -34,36 +34,11 @@ config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
with the hard floating point calling convention, and uses
the VFPv3-D16 FPU instructions.
# See the note above.
config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
bool "Linaro armeb 2014.09"
depends on BR2_armeb
depends on BR2_ARM_CPU_ARMV7A
depends on BR2_HOSTARCH = "x86"
depends on BR2_ARM_EABIHF
depends on !BR2_STATIC_LIBS
select BR2_TOOLCHAIN_EXTERNAL_GLIBC
select BR2_TOOLCHAIN_HAS_SSP
select BR2_TOOLCHAIN_HAS_NATIVE_RPC
select BR2_INSTALL_LIBSTDCPP
select BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_1
select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
select BR2_TOOLCHAIN_HAS_FORTRAN
help
Linaro toolchain for the ARM big endian architecture. It
uses Linaro GCC 2014.09 (based on gcc 4.9), Linaro GDB
2013.10 (based on GDB 7.6), eglibc 2.19, Binutils 2014.09
(based on 2.24). It generates code that runs on all Cortex-A
profile devices, but tuned for the Cortex-A9. The code
generated is Thumb 2, with the hard floating point calling
convention, and uses the VFPv3-D16 FPU instructions.
# See the note above.
config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
bool "Linaro armeb 2016.05"
depends on BR2_armeb
depends on BR2_ARM_CPU_ARMV7A
depends on BR2_HOSTARCH = "x86_64"
depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
depends on BR2_ARM_EABIHF
depends on !BR2_STATIC_LIBS
select BR2_TOOLCHAIN_EXTERNAL_GLIBC