more m740 fixes, makes the regression test work
This commit is contained in:
mrdudz
@@ -186,10 +186,11 @@ void GetEA (EffAddr* A)
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/* Remaining stuff:
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/* Remaining stuff:
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**
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**
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** adr
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** addr
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** adr,x
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** addr, x
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** adr,y
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** addr, y
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** adr,s
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** addr, s
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** addr, relative addr
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*/
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*/
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A->Expr = Expression ();
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A->Expr = Expression ();
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229
src/ca65/instr.c
229
src/ca65/instr.c
@@ -138,6 +138,11 @@ static void PutJSR816 (const InsDesc* Ins);
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** Allowing the long_jsr_jmp_rts feature to permit a long JSR.
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** Allowing the long_jsr_jmp_rts feature to permit a long JSR.
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*/
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*/
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static void PutJSR_m740 (const InsDesc* Ins);
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/* Handle the JSR instruction for the m740
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** Allowing the special page feature.
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*/
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static void PutRTS (const InsDesc* Ins attribute ((unused)));
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static void PutRTS (const InsDesc* Ins attribute ((unused)));
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/* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if
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/* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if
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** the enclosing scope is FAR, but only if the long_jsr_jmp_rts feature applies.
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** the enclosing scope is FAR, but only if the long_jsr_jmp_rts feature applies.
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@@ -1053,6 +1058,9 @@ static const struct {
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}
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}
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};
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};
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/* CAUTION: in the pdf $1a is dec a, and $3a is inc a - if that is really the case,
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* the table below (and the handler) should be fixed and this notice removed */
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/* Instruction table for the m740 CPU */
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/* Instruction table for the m740 CPU */
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static const struct {
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static const struct {
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unsigned Count;
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unsigned Count;
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@@ -1091,82 +1099,82 @@ static const struct {
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{ "BRK", 0x00000001, 0x00, 0, PutAll },
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{ "BRK", 0x00000001, 0x00, 0, PutAll },
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{ "BVC", 0x00020000, 0x50, 0, PutPCRel8 },
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{ "BVC", 0x00020000, 0x50, 0, PutPCRel8 },
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{ "BVS", 0x00020000, 0x70, 0, PutPCRel8 },
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{ "BVS", 0x00020000, 0x70, 0, PutPCRel8 },
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{ "CLB0", 0x0000006, 0x1b, 10, PutAll },
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{ "CLB0", 0x00000006, 0x1b, 10, PutAll },
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{ "CLB1", 0x0000006, 0x3b, 10, PutAll },
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{ "CLB1", 0x00000006, 0x3b, 10, PutAll },
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{ "CLB2", 0x0000006, 0x5b, 10, PutAll },
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{ "CLB2", 0x00000006, 0x5b, 10, PutAll },
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{ "CLB3", 0x0000006, 0x7b, 10, PutAll },
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{ "CLB3", 0x00000006, 0x7b, 10, PutAll },
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{ "CLB4", 0x0000006, 0x9b, 10, PutAll },
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{ "CLB4", 0x00000006, 0x9b, 10, PutAll },
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{ "CLB5", 0x0000006, 0xbb, 10, PutAll },
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{ "CLB5", 0x00000006, 0xbb, 10, PutAll },
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{ "CLB6", 0x0000006, 0xdb, 10, PutAll },
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{ "CLB6", 0x00000006, 0xdb, 10, PutAll },
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{ "CLB7", 0x0000006, 0xfb, 10, PutAll },
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{ "CLB7", 0x00000006, 0xfb, 10, PutAll },
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{ "CLC", 0x0000001, 0x18, 0, PutAll },
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{ "CLC", 0x00000001, 0x18, 0, PutAll },
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{ "CLD", 0x0000001, 0xd8, 0, PutAll },
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{ "CLD", 0x00000001, 0xd8, 0, PutAll },
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{ "CLI", 0x0000001, 0x58, 0, PutAll },
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{ "CLI", 0x00000001, 0x58, 0, PutAll },
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{ "CLT", 0x0000001, 0x12, 0, PutAll },
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{ "CLT", 0x00000001, 0x12, 0, PutAll },
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{ "CLV", 0x0000001, 0xb8, 0, PutAll },
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{ "CLV", 0x00000001, 0xb8, 0, PutAll },
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{ "CMP", 0x080A26C, 0xc0, 0, PutAll },
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{ "CMP", 0x0080A26C, 0xc0, 0, PutAll },
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{ "COM", 0x0000004, 0x44, 1, PutAll },
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{ "COM", 0x00000004, 0x44, 1, PutAll },
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{ "CPX", 0x080000C, 0xe0, 1, PutAll },
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{ "CPX", 0x0080000C, 0xe0, 1, PutAll },
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{ "CPY", 0x080000C, 0xc0, 1, PutAll },
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{ "CPY", 0x0080000C, 0xc0, 1, PutAll },
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{ "DEC", 0x000006F, 0x00, 3, PutAll },
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{ "DEC", 0x0000006F, 0x00, 3, PutAll },
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{ "DEX", 0x0000001, 0xca, 0, PutAll },
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{ "DEX", 0x00000001, 0xca, 0, PutAll },
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{ "DEY", 0x0000001, 0x88, 0, PutAll },
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{ "DEY", 0x00000001, 0x88, 0, PutAll },
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{ "EOR", 0x080A26C, 0x40, 0, PutAll },
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{ "EOR", 0x0080A26C, 0x40, 0, PutAll },
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{ "FST", 0x0000001, 0xe2, 0, PutAll },
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{ "FST", 0x00000001, 0xe2, 0, PutAll },
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{ "INC", 0x000006f, 0x00, 4, PutAll },
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{ "INC", 0x0000006f, 0x00, 4, PutAll },
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{ "INX", 0x0000001, 0xe8, 0, PutAll },
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{ "INX", 0x00000001, 0xe8, 0, PutAll },
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{ "INY", 0x0000001, 0xc8, 0, PutAll },
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{ "INY", 0x00000001, 0xc8, 0, PutAll },
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{ "JMP", 0x0000C08, 0x00, 12, PutAll },
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{ "JMP", 0x00000C08, 0x00, 12, PutAll },
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{ "JSR", 0x0080808, 0x00, 13, PutAll },
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{ "JSR", 0x20000408, 0x00, 13, PutJSR_m740 },
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{ "LDA", 0x080A26C, 0xa0, 0, PutAll },
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{ "LDA", 0x0080A26C, 0xa0, 0, PutAll },
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{ "LDM", 0x10000000, 0x3c, 0, PutLDM_m740 },
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{ "LDM", 0x10000000, 0x3c, 0, PutLDM_m740 },
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{ "LDX", 0x080030C, 0xa2, 1, PutAll },
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{ "LDX", 0x0080030C, 0xa2, 1, PutAll },
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{ "LDY", 0x080006C, 0xa0, 1, PutAll },
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{ "LDY", 0x0080006C, 0xa0, 1, PutAll },
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{ "LSR", 0x000006F, 0x42, 1, PutAll },
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{ "LSR", 0x0000006F, 0x42, 1, PutAll },
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{ "NOP", 0x0000001, 0xea, 0, PutAll },
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{ "NOP", 0x00000001, 0xea, 0, PutAll },
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{ "ORA", 0x080A26C, 0x00, 0, PutAll },
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{ "ORA", 0x0080A26C, 0x00, 0, PutAll },
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{ "PHA", 0x0000001, 0x48, 0, PutAll },
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{ "PHA", 0x00000001, 0x48, 0, PutAll },
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{ "PHP", 0x0000001, 0x08, 0, PutAll },
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{ "PHP", 0x00000001, 0x08, 0, PutAll },
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{ "PLA", 0x0000001, 0x68, 0, PutAll },
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{ "PLA", 0x00000001, 0x68, 0, PutAll },
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{ "PLP", 0x0000001, 0x28, 0, PutAll },
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{ "PLP", 0x00000001, 0x28, 0, PutAll },
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{ "RMB0", 0x0000006, 0x1b, 10, PutAll },
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{ "RMB0", 0x00000006, 0x1b, 10, PutAll },
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{ "RMB1", 0x0000006, 0x3b, 10, PutAll },
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{ "RMB1", 0x00000006, 0x3b, 10, PutAll },
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{ "RMB2", 0x0000006, 0x5b, 10, PutAll },
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{ "RMB2", 0x00000006, 0x5b, 10, PutAll },
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{ "RMB3", 0x0000006, 0x7b, 10, PutAll },
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{ "RMB3", 0x00000006, 0x7b, 10, PutAll },
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{ "RMB4", 0x0000006, 0x9b, 10, PutAll },
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{ "RMB4", 0x00000006, 0x9b, 10, PutAll },
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{ "RMB5", 0x0000006, 0xbb, 10, PutAll },
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{ "RMB5", 0x00000006, 0xbb, 10, PutAll },
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{ "RMB6", 0x0000006, 0xdb, 10, PutAll },
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{ "RMB6", 0x00000006, 0xdb, 10, PutAll },
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{ "RMB7", 0x0000006, 0xfb, 10, PutAll },
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{ "RMB7", 0x00000006, 0xfb, 10, PutAll },
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{ "ROL", 0x000006F, 0x22, 1, PutAll },
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{ "ROL", 0x0000006F, 0x22, 1, PutAll },
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{ "ROR", 0x000006F, 0x62, 1, PutAll },
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{ "ROR", 0x0000006F, 0x62, 1, PutAll },
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{ "RRF", 0x0000004, 0x82, 6, PutAll },
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{ "RRF", 0x00000004, 0x82, 6, PutAll },
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{ "RTI", 0x0000001, 0x40, 0, PutAll },
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{ "RTI", 0x00000001, 0x40, 0, PutAll },
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{ "RTS", 0x0000001, 0x60, 0, PutAll },
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{ "RTS", 0x00000001, 0x60, 0, PutAll },
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{ "SBC", 0x080A26C, 0xe0, 0, PutAll },
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{ "SBC", 0x0080A26C, 0xe0, 0, PutAll },
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{ "SEB0", 0x0000006, 0x0b, 10, PutAll },
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{ "SEB0", 0x00000006, 0x0b, 10, PutAll },
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{ "SEB1", 0x0000006, 0x2b, 10, PutAll },
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{ "SEB1", 0x00000006, 0x2b, 10, PutAll },
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{ "SEB2", 0x0000006, 0x4b, 10, PutAll },
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{ "SEB2", 0x00000006, 0x4b, 10, PutAll },
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{ "SEB3", 0x0000006, 0x6b, 10, PutAll },
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{ "SEB3", 0x00000006, 0x6b, 10, PutAll },
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{ "SEB4", 0x0000006, 0x8b, 10, PutAll },
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{ "SEB4", 0x00000006, 0x8b, 10, PutAll },
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{ "SEB5", 0x0000006, 0xab, 10, PutAll },
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{ "SEB5", 0x00000006, 0xab, 10, PutAll },
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{ "SEB6", 0x0000006, 0xcb, 10, PutAll },
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{ "SEB6", 0x00000006, 0xcb, 10, PutAll },
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{ "SEB7", 0x0000006, 0xeb, 10, PutAll },
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{ "SEB7", 0x00000006, 0xeb, 10, PutAll },
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{ "SEC", 0x0000001, 0x38, 0, PutAll },
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{ "SEC", 0x00000001, 0x38, 0, PutAll },
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{ "SED", 0x0000001, 0xf8, 0, PutAll },
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{ "SED", 0x00000001, 0xf8, 0, PutAll },
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{ "SEI", 0x0000001, 0x78, 0, PutAll },
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{ "SEI", 0x00000001, 0x78, 0, PutAll },
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{ "SET", 0x0000001, 0x32, 0, PutAll },
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{ "SET", 0x00000001, 0x32, 0, PutAll },
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{ "SLW", 0x0000001, 0xC2, 0, PutAll },
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{ "SLW", 0x00000001, 0xC2, 0, PutAll },
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{ "STA", 0x000A26C, 0x80, 0, PutAll },
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{ "STA", 0x0000A26C, 0x80, 0, PutAll },
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{ "STP", 0x0000001, 0x42, 0, PutAll },
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{ "STP", 0x00000001, 0x42, 0, PutAll },
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{ "STX", 0x000010c, 0x82, 1, PutAll },
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{ "STX", 0x0000010c, 0x82, 1, PutAll },
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{ "STY", 0x000002c, 0x80, 1, PutAll },
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{ "STY", 0x0000002c, 0x80, 1, PutAll },
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{ "TAX", 0x0000001, 0xaa, 0, PutAll },
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{ "TAX", 0x00000001, 0xaa, 0, PutAll },
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{ "TAY", 0x0000001, 0xa8, 0, PutAll },
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{ "TAY", 0x00000001, 0xa8, 0, PutAll },
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{ "TST", 0x0000004, 0x64, 0, PutAll },
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{ "TST", 0x00000004, 0x64, 1, PutAll },
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{ "TSX", 0x0000001, 0xba, 0, PutAll },
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{ "TSX", 0x00000001, 0xba, 0, PutAll },
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{ "TXA", 0x0000001, 0x8a, 0, PutAll },
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{ "TXA", 0x00000001, 0x8a, 0, PutAll },
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{ "TXS", 0x0000001, 0x9a, 0, PutAll },
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{ "TXS", 0x00000001, 0x9a, 0, PutAll },
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{ "TYA", 0x0000001, 0x98, 0, PutAll }
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{ "TYA", 0x00000001, 0x98, 0, PutAll }
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/* END SORTED.SH */
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/* END SORTED.SH */
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}
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}
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};
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};
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@@ -1197,43 +1205,43 @@ static unsigned char EATab[14][AM65I_COUNT] = {
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0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09,
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0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 1 */
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{ /* Table 1 (rol, ror, stx, sty) */
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0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00,
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0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00,
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0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,
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0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x80, 0x00
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0x00, 0x00, 0x80, 0x00
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},
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},
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{ /* Table 2 */
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{ /* Table 2 (bit) */
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0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00,
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0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 3 */
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{ /* Table 3 (dec, dea) */
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0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00,
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0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 4 */
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{ /* Table 4 (inc) */
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0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00,
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0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 5 */
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{ /* Table 5 (stz) */
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0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00,
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0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 6 */
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{ /* Table 6 (jmp) */
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0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
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0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x90, 0x00
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0x00, 0x00, 0x90, 0x00
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},
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},
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{ /* Table 7 (Subroutine opcodes) */
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{ /* Table 7 (Subroutine opcodes) (jsr) */
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0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
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0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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@@ -1245,7 +1253,7 @@ static unsigned char EATab[14][AM65I_COUNT] = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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0x00, 0x00, 0x00, 0x00
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},
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},
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{ /* Table 9 */
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{ /* Table 9 (dew, inw) */
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0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00,
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0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00,
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||||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
@@ -1644,7 +1652,7 @@ static void PutBitBranch_m740 (const InsDesc* Ins)
|
|||||||
/* Accu */
|
/* Accu */
|
||||||
Emit0 (A.Opcode);
|
Emit0 (A.Opcode);
|
||||||
ConsumeComma ();
|
ConsumeComma ();
|
||||||
EmitSigned (GenBranchExpr (1), 1);
|
EmitSigned (GenBranchExpr (2), 1);
|
||||||
} else if (A.AddrModeSet == 0x10000000) {
|
} else if (A.AddrModeSet == 0x10000000) {
|
||||||
A.Opcode += 0x04;
|
A.Opcode += 0x04;
|
||||||
/* Zeropage */
|
/* Zeropage */
|
||||||
@@ -1870,6 +1878,59 @@ static void PutJSR816 (const InsDesc* Ins)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void PutJSR_m740 (const InsDesc* Ins)
|
||||||
|
/* Handle a JSR instruction for m740 */
|
||||||
|
{
|
||||||
|
EffAddr A;
|
||||||
|
|
||||||
|
/* Evaluate the addressing mode used */
|
||||||
|
GetEA (&A);
|
||||||
|
|
||||||
|
/* From the possible addressing modes, remove the ones that are invalid
|
||||||
|
** for this instruction or CPU.
|
||||||
|
*/
|
||||||
|
A.AddrModeSet &= Ins->AddrMode;
|
||||||
|
|
||||||
|
/* Check if we have any adressing modes left */
|
||||||
|
if (A.AddrModeSet == 0) {
|
||||||
|
Error ("Illegal addressing mode");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
A.AddrMode = BitFind (A.AddrModeSet);
|
||||||
|
A.AddrModeBit = (0x01UL << A.AddrMode);
|
||||||
|
|
||||||
|
/* Build the opcode */
|
||||||
|
/* A.Opcode = Ins->BaseCode | EATab[Ins->ExtCode][A.AddrMode] | A.Reg; */
|
||||||
|
A.Opcode = Ins->BaseCode;
|
||||||
|
|
||||||
|
switch (A.AddrMode) {
|
||||||
|
case AM65I_DIR_IND:
|
||||||
|
A.Opcode = 0x02;
|
||||||
|
Emit1 (A.Opcode, A.Expr);
|
||||||
|
break;
|
||||||
|
case AM65I_ABS:
|
||||||
|
/* If we have an expression and it's const, get it's value */
|
||||||
|
if (A.Expr) {
|
||||||
|
long Val = -1;
|
||||||
|
if (IsConstExpr (A.Expr, &Val)) {
|
||||||
|
if ((Val & 0xff00) == 0xff00) {
|
||||||
|
/* direct page */
|
||||||
|
A.Opcode = 0x22;
|
||||||
|
Emit0 (A.Opcode);
|
||||||
|
EmitByte(GenByteExpr(A.Expr));
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
A.Opcode = 0x20;
|
||||||
|
Emit2 (A.Opcode, A.Expr);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
Internal ("Invalid Opcode 0x%02x", A.Opcode);
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
static void PutRTS (const InsDesc* Ins attribute ((unused)))
|
static void PutRTS (const InsDesc* Ins attribute ((unused)))
|
||||||
/* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if
|
/* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if
|
||||||
|
|||||||
@@ -68,8 +68,8 @@
|
|||||||
#define AM65_ABS_LONG_X 0x00000080UL /* -- */
|
#define AM65_ABS_LONG_X 0x00000080UL /* -- */
|
||||||
#define AM65_DIR_Y 0x00000100UL /* ZP, Y */
|
#define AM65_DIR_Y 0x00000100UL /* ZP, Y */
|
||||||
#define AM65_ABS_Y 0x00000200UL /* ABS, Y */
|
#define AM65_ABS_Y 0x00000200UL /* ABS, Y */
|
||||||
#define AM65_DIR_IND 0x00000400UL /* ZP, IND */
|
#define AM65_DIR_IND 0x00000400UL /* (ZP IND) */
|
||||||
#define AM65_ABS_IND 0x00000800UL /* IND */
|
#define AM65_ABS_IND 0x00000800UL /* (IND) */
|
||||||
#define AM65_DIR_IND_LONG 0x00001000UL /* -- */
|
#define AM65_DIR_IND_LONG 0x00001000UL /* -- */
|
||||||
#define AM65_DIR_IND_Y 0x00002000UL /* IND, Y */
|
#define AM65_DIR_IND_Y 0x00002000UL /* IND, Y */
|
||||||
#define AM65_DIR_IND_LONG_Y 0x00004000UL /* -- */
|
#define AM65_DIR_IND_LONG_Y 0x00004000UL /* -- */
|
||||||
@@ -87,40 +87,55 @@
|
|||||||
#define AM65_ABS_IND_LONG 0x04000000UL /* -- */
|
#define AM65_ABS_IND_LONG 0x04000000UL /* -- */
|
||||||
#define AM65_IMM_IMPLICIT_WORD 0x08000000UL /* PHW #$1234 (4510 only) */
|
#define AM65_IMM_IMPLICIT_WORD 0x08000000UL /* PHW #$1234 (4510 only) */
|
||||||
#define AM65_ZP_REL 0x10000000UL /* ZP, REL (m740) */
|
#define AM65_ZP_REL 0x10000000UL /* ZP, REL (m740) */
|
||||||
|
#define AM65_SPECIAL_PAGE 0x20000000UL /* $FFxx (m740) */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Bitmask for all ZP operations that have correspondent ABS ops */
|
/* Bitmask for all ZP operations that have correspondent ABS ops */
|
||||||
/* $8524 */
|
|
||||||
#define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
|
#define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
|
||||||
/*$4 $20 $100 $400 $8000 */
|
|
||||||
/* Bitmask for all ABS operations that have correspondent FAR ops */
|
/* Bitmask for all ABS operations that have correspondent FAR ops */
|
||||||
/* $48 */
|
|
||||||
#define AM65_SET_ABS (AM65_ABS | AM65_ABS_X)
|
#define AM65_SET_ABS (AM65_ABS | AM65_ABS_X)
|
||||||
/* $8 $40 */
|
|
||||||
/* Bitmask for all ZP operations */
|
/* Bitmask for all ZP operations */
|
||||||
/* $8524 */
|
|
||||||
#define AM65_ALL_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
|
#define AM65_ALL_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
|
||||||
/*$4 $20 $100 $400 $8000 */
|
|
||||||
/* Bitmask for all ABS operations */
|
/* Bitmask for all ABS operations */
|
||||||
/* $10a48 */
|
|
||||||
#define AM65_ALL_ABS (AM65_ABS | AM65_ABS_X | AM65_ABS_Y | AM65_ABS_IND | AM65_ABS_X_IND)
|
#define AM65_ALL_ABS (AM65_ABS | AM65_ABS_X | AM65_ABS_Y | AM65_ABS_IND | AM65_ABS_X_IND)
|
||||||
/* $8 $40 $200 $800 $10000 */
|
|
||||||
/* Bitmask for all FAR operations */
|
/* Bitmask for all FAR operations */
|
||||||
/* $90 */
|
|
||||||
#define AM65_ALL_FAR (AM65_ABS_LONG | AM65_ABS_LONG_X)
|
#define AM65_ALL_FAR (AM65_ABS_LONG | AM65_ABS_LONG_X)
|
||||||
/* $10 $80 */
|
|
||||||
|
|
||||||
/* Bitmask for all immediate operations */
|
/* Bitmask for all immediate operations */
|
||||||
/* $8e00 000 */
|
|
||||||
#define AM65_ALL_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT | AM65_IMM_IMPLICIT_WORD)
|
#define AM65_ALL_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT | AM65_IMM_IMPLICIT_WORD)
|
||||||
/* $200000 $400000 $800000 $8000000 */
|
|
||||||
/* Bit numbers and count */
|
/* Bit numbers and count */
|
||||||
#define AM65I_IMM_ACCU 21
|
#define AM65I_IMPLICIT 0
|
||||||
#define AM65I_IMM_INDEX 22
|
#define AM65I_ACCU 1
|
||||||
#define AM65I_IMM_IMPLICIT 23
|
#define AM65I_DIR 2
|
||||||
#define AM65I_IMM_IMPLICIT_WORD 27
|
#define AM65I_ABS 3
|
||||||
#define AM65I_COUNT 28
|
#define AM65I_ABS_LONG 4
|
||||||
|
#define AM65I_DIR_X 5
|
||||||
|
#define AM65I_ABS_X 6
|
||||||
|
#define AM65I_ABS_LONG_X 7
|
||||||
|
#define AM65I_DIR_Y 8
|
||||||
|
#define AM65I_ABS_Y 9
|
||||||
|
#define AM65I_DIR_IND 10
|
||||||
|
#define AM65I_ABS_IND 11
|
||||||
|
#define AM65I_DIR_IND_LONG 12
|
||||||
|
#define AM65I_DIR_IND_Y 13
|
||||||
|
#define AM65I_DIR_IND_LONG_Y 14
|
||||||
|
#define AM65I_DIR_X_IND 15
|
||||||
|
#define AM65I_ABS_X_IND 16
|
||||||
|
#define AM65I_REL 17
|
||||||
|
#define AM65I_REL_LONG 18
|
||||||
|
#define AM65I_STACK_REL 19
|
||||||
|
#define AM65I_STACK_REL_IND_Y 20
|
||||||
|
#define AM65I_IMM_ACCU 21
|
||||||
|
#define AM65I_IMM_INDEX 22
|
||||||
|
#define AM65I_IMM_IMPLICIT 23
|
||||||
|
#define AM65I_BLOCKMOVE 24
|
||||||
|
#define AM65I_BLOCKXFER 25
|
||||||
|
#define AM65I_ABS_IND_LONG 26
|
||||||
|
#define AM65I_IMM_IMPLICIT_WORD 27
|
||||||
|
#define AM65I_ZP_REL 28
|
||||||
|
#define AM65I_SPECIAL_PAGE 29
|
||||||
|
#define AM65I_COUNT 30
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -795,14 +795,14 @@ void OH_JmpDirectIndirect (const OpcDesc* D)
|
|||||||
|
|
||||||
void OH_SpecialPage (const OpcDesc* D)
|
void OH_SpecialPage (const OpcDesc* D)
|
||||||
{
|
{
|
||||||
/* Get the operand */
|
/* Get the operand */
|
||||||
unsigned Addr = 0xFF00 + GetCodeByte (PC+1);
|
unsigned Addr = 0xFF00 + GetCodeByte (PC+1);
|
||||||
|
|
||||||
/* Generate a label in pass 1 */
|
/* Generate a label in pass 1 */
|
||||||
GenerateLabel (D->Flags, Addr);
|
GenerateLabel (D->Flags, Addr);
|
||||||
|
|
||||||
/* OneLine (D, "$FF%02X", (CodeByte (PC+1)); */
|
/* OneLine (D, "$FF%02X", (CodeByte (PC+1)); */
|
||||||
OneLine (D, "%s", GetAddrArg (D->Flags, Addr));
|
OneLine (D, "%s", GetAddrArg (D->Flags, Addr));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -44,7 +44,8 @@
|
|||||||
/* Data */
|
/* Data */
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
/* CAUTION: in the pdf $1a is dec, and $3a is inc - if that is really the case,
|
||||||
|
* the table below should be fixed and this notice removed */
|
||||||
|
|
||||||
/* Descriptions for all opcodes */
|
/* Descriptions for all opcodes */
|
||||||
const OpcDesc OpcTable_M740[256] = {
|
const OpcDesc OpcTable_M740[256] = {
|
||||||
@@ -74,7 +75,7 @@ const OpcDesc OpcTable_M740[256] = {
|
|||||||
{ "bbc0", 3, flUseLabel, OH_BitBranch_m740 }, /* $17 */
|
{ "bbc0", 3, flUseLabel, OH_BitBranch_m740 }, /* $17 */
|
||||||
{ "clc", 1, flNone, OH_Implicit }, /* $18 */
|
{ "clc", 1, flNone, OH_Implicit }, /* $18 */
|
||||||
{ "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */
|
{ "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */
|
||||||
{ "dec", 1, flNone, OH_Accumulator }, /* $1a */
|
{ "inc", 1, flNone, OH_Accumulator }, /* $1a */
|
||||||
{ "clb0", 1, flNone, OH_AccumulatorBit }, /* $1b */
|
{ "clb0", 1, flNone, OH_AccumulatorBit }, /* $1b */
|
||||||
{ "", 1, flIllegal, OH_Illegal }, /* $1c */
|
{ "", 1, flIllegal, OH_Illegal }, /* $1c */
|
||||||
{ "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */
|
{ "ora", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $1d */
|
||||||
@@ -106,7 +107,7 @@ const OpcDesc OpcTable_M740[256] = {
|
|||||||
{ "bbc1", 3, flUseLabel, OH_BitBranch_m740 }, /* $37 */
|
{ "bbc1", 3, flUseLabel, OH_BitBranch_m740 }, /* $37 */
|
||||||
{ "sec", 1, flNone, OH_Implicit }, /* $38 */
|
{ "sec", 1, flNone, OH_Implicit }, /* $38 */
|
||||||
{ "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */
|
{ "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */
|
||||||
{ "inc", 1, flNone, OH_Accumulator }, /* $3a */
|
{ "dec", 1, flNone, OH_Accumulator }, /* $3a */
|
||||||
{ "clb1", 1, flNone, OH_AccumulatorBit }, /* $3b */
|
{ "clb1", 1, flNone, OH_AccumulatorBit }, /* $3b */
|
||||||
{ "ldm", 3, flLabel, OH_DirectImmediate }, /* $3c */
|
{ "ldm", 3, flLabel, OH_DirectImmediate }, /* $3c */
|
||||||
{ "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */
|
{ "and", 3, flUseLabel|flAbsOverride, OH_AbsoluteX }, /* $3d */
|
||||||
|
|||||||
BIN
test/asm/opcodes/m740-opcodes.ref
Normal file
BIN
test/asm/opcodes/m740-opcodes.ref
Normal file
Binary file not shown.
@@ -1,260 +1,565 @@
|
|||||||
.setcpu "65C02"
|
; da65 V2.19 - Git 89651fd8b
|
||||||
; copy of 65c02, comments note changes to the m740 according to
|
; Created: 2025-06-16 20:10:42
|
||||||
; http://documentation.renesas.com/doc/products/mpumcu/rej09b0322_740sm.pdf
|
; Input file: testfile
|
||||||
|
; Page: 1
|
||||||
|
|
||||||
brk
|
|
||||||
ora ($12,x)
|
.setcpu "m740"
|
||||||
.byte $02,$00,$00 ; jsr zp,ind
|
|
||||||
.byte $03,$00,$00 ; bbs 0,a
|
L000C := $000C
|
||||||
tsb $12 ; .byte $04
|
L040C := $040C
|
||||||
ora $12
|
LFF0C := $FF0C
|
||||||
asl $12
|
brk
|
||||||
rmb0 $12 ; bbs 0,zp
|
.byte $0C
|
||||||
php
|
.byte $04
|
||||||
ora #$12
|
ora (L000C,x)
|
||||||
asl a
|
.byte $04
|
||||||
.byte $0B,$00,$00 ; seb 0,a
|
jsr (L000C)
|
||||||
tsb $3456 ; .byte $0c
|
|
||||||
ora $3456
|
.byte $04
|
||||||
asl $3456
|
bbs0 a, L8018
|
||||||
bbr0 $12,*+122 ; seb 0,zp
|
.byte $04
|
||||||
bpl *+122
|
.byte $04
|
||||||
ora ($12),y
|
.byte $0C
|
||||||
ora ($12) ; clt
|
.byte $04
|
||||||
.byte $13,$00,$00 ; bbc 0,a
|
ora L000C
|
||||||
trb $12 ; .byte $14
|
.byte $04
|
||||||
ora $12,x
|
asl L000C
|
||||||
asl $12,x
|
.byte $04
|
||||||
rmb1 $12 ; bbc 0,zp
|
bbs0 L000C, L801C
|
||||||
clc
|
L8018: php
|
||||||
ora $3456,y
|
.byte $0C
|
||||||
inc a
|
.byte $04
|
||||||
.byte $1B,$00,$00 ; clb 0,a
|
.byte $09
|
||||||
trb $3456 ; .byte $1c
|
L801C: .byte $0C
|
||||||
ora $3456,x
|
.byte $04
|
||||||
asl $3456,x
|
asl a
|
||||||
bbr1 $12,*+122 ; clb 0,zp
|
.byte $0C
|
||||||
jsr $3456
|
.byte $04
|
||||||
and ($12,x)
|
seb0 a
|
||||||
.byte $22,$00,$00 ; jsr sp
|
.byte $0C
|
||||||
.byte $23,$00,$00 ; bbs 1,a
|
.byte $04
|
||||||
bit $12
|
.byte $0C
|
||||||
and $12
|
.byte $0C
|
||||||
rol $12
|
.byte $04
|
||||||
rmb2 $12 ; bbs 1,zp
|
ora L040C
|
||||||
plp
|
asl L040C
|
||||||
and #$12
|
seb0 L000C
|
||||||
rol a
|
.byte $04
|
||||||
.byte $2B,$00,$00 ; seb 1,a
|
bpl L803E
|
||||||
bit $3456
|
.byte $04
|
||||||
and $3456
|
ora (L000C),y
|
||||||
rol $3456
|
.byte $04
|
||||||
bbr2 $12,*+122 ; seb 1,zp
|
clt
|
||||||
bmi *+122
|
.byte $0C
|
||||||
and ($12),y
|
.byte $04
|
||||||
and ($12) ; set
|
bbc0 a, L8048
|
||||||
.byte $33,$00,$00 ; bbc 1,a
|
.byte $04
|
||||||
bit $12,x ; .byte $34
|
.byte $14
|
||||||
and $12,x
|
.byte $0C
|
||||||
rol $12,x
|
L803E: .byte $04
|
||||||
rmb3 $12 ; bbc 1,zp
|
ora L000C,x
|
||||||
sec
|
.byte $04
|
||||||
and $3456,y
|
asl L000C,x
|
||||||
dec a
|
.byte $04
|
||||||
.byte $3B,$00,$00 ; clb 1,a
|
bbc0 L000C, L804C
|
||||||
bit $3456,x ; ldm zp
|
L8048: clc
|
||||||
and $3456,x
|
.byte $0C
|
||||||
rol $3456,x
|
.byte $04
|
||||||
bbr3 $12,*+122 ; clb 1,zp
|
.byte $19
|
||||||
rti
|
L804C: .byte $0C
|
||||||
eor ($12,x)
|
.byte $04
|
||||||
.byte $42,$00,$00 ; stp
|
inc a
|
||||||
.byte $43,$00,$00 ; bbs 2,a
|
.byte $0C
|
||||||
.byte $44,$00,$00 ; com zp
|
.byte $04
|
||||||
eor $12
|
clb0 a
|
||||||
lsr $12
|
.byte $0C
|
||||||
rmb4 $12 ; bbs 2,zp
|
.byte $04
|
||||||
pha
|
.byte $1C
|
||||||
eor #$12
|
.byte $0C
|
||||||
lsr a
|
.byte $04
|
||||||
.byte $4B,$00,$00 ; seb 2,a
|
ora L040C,x
|
||||||
jmp $3456
|
asl L040C,x
|
||||||
eor $3456
|
clb0 L000C
|
||||||
lsr $3456
|
.byte $04
|
||||||
bbr4 $12,*+122 ; seb 2,zp
|
jsr L040C
|
||||||
bvc *+122
|
and (L000C,x)
|
||||||
eor ($12),y
|
.byte $04
|
||||||
eor ($12) ; .byte $52
|
jsr LFF0C
|
||||||
.byte $53,$00,$00 ; bbc 2,a
|
.byte $04
|
||||||
.byte $54,$00,$00
|
bbs1 a, L8078
|
||||||
eor $12,x
|
.byte $04
|
||||||
lsr $12,x
|
bit L000C
|
||||||
rmb5 $12 ; bbc 2,zp
|
.byte $04
|
||||||
cli
|
and L000C
|
||||||
eor $3456,y
|
.byte $04
|
||||||
phy
|
rol L000C
|
||||||
.byte $5B,$00,$00 ; clb 2,a
|
.byte $04
|
||||||
.byte $5C,$00,$00
|
bbs1 L000C, L807C
|
||||||
eor $3456,x
|
L8078: plp
|
||||||
lsr $3456,x
|
.byte $0C
|
||||||
bbr5 $12,*+122 ; clb 2,zp
|
.byte $04
|
||||||
rts
|
.byte $29
|
||||||
adc ($12,x)
|
L807C: .byte $0C
|
||||||
.byte $62,$00,$00 ; mul zp,x
|
.byte $04
|
||||||
.byte $63,$00,$00 ; bbs 3,a
|
rol a
|
||||||
stz $12 ; tst zp
|
.byte $0C
|
||||||
adc $12
|
.byte $04
|
||||||
ror $12
|
seb1 a
|
||||||
rmb6 $12 ; bbs 3,zp
|
.byte $0C
|
||||||
pla
|
.byte $04
|
||||||
adc #$12
|
bit L040C
|
||||||
ror a
|
and L040C
|
||||||
.byte $6B,$00,$00 ; seb 3,a
|
rol L040C
|
||||||
jmp ($3456)
|
seb1 L000C
|
||||||
adc $3456
|
.byte $04
|
||||||
ror $3456
|
bmi L809E
|
||||||
bbr6 $12,*+122 ; seb 3,zp
|
.byte $04
|
||||||
bvs *+122
|
and (L000C),y
|
||||||
adc ($12),y
|
.byte $04
|
||||||
adc ($12) ; .byte $72
|
set
|
||||||
.byte $73,$00,$00 ; bbc 3,a
|
.byte $0C
|
||||||
stz $12,x ; .byte $74
|
.byte $04
|
||||||
adc $12,x
|
bbc1 a, L80A8
|
||||||
ror $12,x
|
.byte $04
|
||||||
rmb7 $12 ; bbc 3,zp
|
.byte $34
|
||||||
sei
|
.byte $0C
|
||||||
adc $3456,y
|
L809E: .byte $04
|
||||||
ply
|
and L000C,x
|
||||||
.byte $7B,$00,$00 ; clb 3,a
|
.byte $04
|
||||||
jmp ($3456,x) ; .byte $7c
|
rol L000C,x
|
||||||
adc $3456,x
|
.byte $04
|
||||||
ror $3456,x
|
bbc1 L000C, L80AC
|
||||||
bbr7 $12,*+122 ; clb 3,zp
|
L80A8: sec
|
||||||
bra *+122
|
.byte $0C
|
||||||
sta ($12,x)
|
.byte $04
|
||||||
.byte $82,$00,$00 ; rrf zp
|
.byte $39
|
||||||
.byte $83,$00,$00 ; bbs 4,a
|
L80AC: .byte $0C
|
||||||
sty $12
|
.byte $04
|
||||||
sta $12
|
dec a
|
||||||
stx $12
|
.byte $0C
|
||||||
smb0 $12 ; bbs 4,zp
|
.byte $04
|
||||||
dey
|
clb1 a
|
||||||
bit #$12
|
.byte $0C
|
||||||
txa
|
.byte $04
|
||||||
.byte $8B,$00,$00 ; seb 4,a
|
ldm L000C, #$04
|
||||||
sty $3456
|
and L040C,x
|
||||||
sta $3456
|
rol L040C,x
|
||||||
stx $3456
|
clb1 L000C
|
||||||
bbs0 $12,*+122 ; seb 4,zp
|
.byte $04
|
||||||
bcc *+122
|
rti
|
||||||
sta ($12),y
|
|
||||||
sta ($12) ; .byte $92
|
.byte $0C
|
||||||
.byte $93,$00,$00 ; bbc 4,a
|
.byte $04
|
||||||
sty $12,x
|
eor (L000C,x)
|
||||||
sta $12,x
|
.byte $04
|
||||||
stx $12,y
|
stp
|
||||||
smb1 $12 ; bbc 4,zp
|
.byte $0C
|
||||||
tya
|
.byte $04
|
||||||
sta $3456,y
|
bbs2 a, L80D8
|
||||||
txs
|
.byte $04
|
||||||
.byte $9B,$00,$00 ; clb 4,a
|
com L000C
|
||||||
stz $3456 ; .byte $9c
|
.byte $04
|
||||||
sta $3456,x
|
eor L000C
|
||||||
stz $3456,x ; .byte $9e
|
.byte $04
|
||||||
bbs1 $12,*+122 ; clb 4,zp
|
lsr L000C
|
||||||
ldy #$12
|
.byte $04
|
||||||
lda ($12,x)
|
bbs2 L000C, L80DC
|
||||||
ldx #$12
|
L80D8: pha
|
||||||
.byte $A3,$00,$00 ; bbs 5,a
|
.byte $0C
|
||||||
ldy $12
|
.byte $04
|
||||||
lda $12
|
.byte $49
|
||||||
ldx $12
|
L80DC: .byte $0C
|
||||||
smb2 $12 ; bbs 5,zp
|
.byte $04
|
||||||
tay
|
lsr a
|
||||||
lda #$12
|
.byte $0C
|
||||||
tax
|
.byte $04
|
||||||
.byte $AB,$00,$00 ; seb 5,a
|
seb2 a
|
||||||
ldy $3456
|
.byte $0C
|
||||||
lda $3456
|
.byte $04
|
||||||
ldx $3456
|
jmp L040C
|
||||||
bbs2 $12,*+122 ; seb 5,zp
|
|
||||||
bcs *+122
|
eor L040C
|
||||||
lda ($12),y
|
lsr L040C
|
||||||
lda ($12) ; .byte $b2
|
seb2 L000C
|
||||||
.byte $B3,$00,$00 ; bbc 5,a
|
.byte $04
|
||||||
ldy $12,x
|
bvc L80FE
|
||||||
lda $12,x
|
.byte $04
|
||||||
ldx $12,y
|
eor (L000C),y
|
||||||
smb3 $12 ; bbc 5,zp
|
.byte $04
|
||||||
clv
|
.byte $52
|
||||||
lda $3456,y
|
.byte $0C
|
||||||
tsx
|
.byte $04
|
||||||
.byte $BB,$00,$00 ; clb 5,a
|
bbc2 a, L8108
|
||||||
ldy $3456,x
|
.byte $04
|
||||||
lda $3456,x
|
.byte $54
|
||||||
ldx $3456,y
|
.byte $0C
|
||||||
bbs3 $12,*+122 ; clb 5,zp
|
L80FE: .byte $04
|
||||||
cpy #$12
|
eor L000C,x
|
||||||
cmp ($12,x)
|
.byte $04
|
||||||
.byte $C2,$00,$00 ; wit
|
lsr L000C,x
|
||||||
.byte $C3,$00,$00 ; bbs 6,a
|
.byte $04
|
||||||
cpy $12
|
bbc2 L000C, L810C
|
||||||
cmp $12
|
L8108: cli
|
||||||
dec $12
|
.byte $0C
|
||||||
smb4 $12 ; bbs 6,zp
|
.byte $04
|
||||||
iny
|
.byte $59
|
||||||
cmp #$12
|
L810C: .byte $0C
|
||||||
dex
|
.byte $04
|
||||||
.byte $CB,$00,$00 ; seb 6,a
|
.byte $5A
|
||||||
cpy $3456
|
.byte $0C
|
||||||
cmp $3456
|
.byte $04
|
||||||
dec $3456
|
clb2 a
|
||||||
bbs4 $12,*+122 ; seb 6,zp
|
.byte $0C
|
||||||
bne *+122
|
.byte $04
|
||||||
cmp ($12),y
|
.byte $5C
|
||||||
cmp ($12) ; .byte $d2
|
.byte $0C
|
||||||
.byte $D3,$00,$00 ; bbc 6,a
|
.byte $04
|
||||||
.byte $D4,$00,$00
|
eor L040C,x
|
||||||
cmp $12,x
|
lsr L040C,x
|
||||||
dec $12,x
|
clb2 L000C
|
||||||
smb5 $12 ; bbc 6,zp
|
.byte $04
|
||||||
cld
|
rts
|
||||||
cmp $3456,y
|
|
||||||
phx
|
.byte $0C
|
||||||
.byte $DB,$00,$00 ; clb 6,a
|
.byte $04
|
||||||
.byte $DC,$00,$00
|
adc (L000C,x)
|
||||||
cmp $3456,x
|
.byte $04
|
||||||
dec $3456,x
|
.byte $62
|
||||||
bbs5 $12,*+122 ; clb 6,zp
|
.byte $0C
|
||||||
cpx #$12
|
.byte $04
|
||||||
sbc ($12,x)
|
bbs3 a, L8138
|
||||||
.byte $E2,$00,$00 ; div zp,x
|
.byte $04
|
||||||
.byte $E3,$00,$00 ; bbs 7,a
|
tst L000C
|
||||||
cpx $12
|
.byte $04
|
||||||
sbc $12
|
adc L000C
|
||||||
inc $12
|
.byte $04
|
||||||
smb6 $12 ; bbs 7,zp
|
ror L000C
|
||||||
inx
|
.byte $04
|
||||||
sbc #$12
|
bbs3 L000C, L813C
|
||||||
nop
|
L8138: pla
|
||||||
.byte $EB,$00,$00 ; seb 7,a
|
.byte $0C
|
||||||
cpx $3456
|
.byte $04
|
||||||
sbc $3456
|
.byte $69
|
||||||
inc $3456
|
L813C: .byte $0C
|
||||||
bbs6 $12,*+122 ; seb 7,zp
|
.byte $04
|
||||||
beq *+122
|
ror a
|
||||||
sbc ($12),y
|
.byte $0C
|
||||||
sbc ($12) ; .byte $f2
|
.byte $04
|
||||||
.byte $F3,$00,$00 ; bbc 7,a
|
seb3 a
|
||||||
.byte $F4,$00,$00
|
.byte $0C
|
||||||
sbc $12,x
|
.byte $04
|
||||||
inc $12,x
|
jmp (L040C)
|
||||||
smb7 $12 ; bbc 7,zp
|
|
||||||
sed
|
adc L040C
|
||||||
sbc $3456,y
|
ror L040C
|
||||||
plx
|
seb3 L000C
|
||||||
.byte $FB,$00,$00 ; clb 7,a
|
.byte $04
|
||||||
.byte $FC,$00,$00
|
bvs L815E
|
||||||
sbc $3456,x
|
.byte $04
|
||||||
inc $3456,x
|
adc (L000C),y
|
||||||
bbs7 $12,*+122 ; clb 7,zp
|
.byte $04
|
||||||
|
.byte $72
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbc3 a, L8168
|
||||||
|
.byte $04
|
||||||
|
.byte $74
|
||||||
|
.byte $0C
|
||||||
|
L815E: .byte $04
|
||||||
|
adc L000C,x
|
||||||
|
.byte $04
|
||||||
|
ror L000C,x
|
||||||
|
.byte $04
|
||||||
|
bbc3 L000C, L816C
|
||||||
|
L8168: sei
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $79
|
||||||
|
L816C: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $7A
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb3 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $7C
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
adc L040C,x
|
||||||
|
ror L040C,x
|
||||||
|
clb3 L000C
|
||||||
|
.byte $04
|
||||||
|
bra L818E
|
||||||
|
.byte $04
|
||||||
|
sta (L000C,x)
|
||||||
|
.byte $04
|
||||||
|
rrf L000C
|
||||||
|
.byte $04
|
||||||
|
bbs4 a, L8198
|
||||||
|
.byte $04
|
||||||
|
sty L000C
|
||||||
|
L818E: .byte $04
|
||||||
|
sta L000C
|
||||||
|
.byte $04
|
||||||
|
stx L000C
|
||||||
|
.byte $04
|
||||||
|
bbs4 L000C, L819C
|
||||||
|
L8198: dey
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $89
|
||||||
|
L819C: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
txa
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
seb4 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
sty L040C
|
||||||
|
sta L040C
|
||||||
|
stx L040C
|
||||||
|
seb4 L000C
|
||||||
|
.byte $04
|
||||||
|
bcc L81BE
|
||||||
|
.byte $04
|
||||||
|
sta (L000C),y
|
||||||
|
.byte $04
|
||||||
|
.byte $92
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbc4 a, L81C8
|
||||||
|
.byte $04
|
||||||
|
sty L000C,x
|
||||||
|
L81BE: .byte $04
|
||||||
|
sta L000C,x
|
||||||
|
.byte $04
|
||||||
|
stx L000C,y
|
||||||
|
.byte $04
|
||||||
|
bbc4 L000C, L81CC
|
||||||
|
L81C8: tya
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $99
|
||||||
|
L81CC: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
txs
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb4 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $9C
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
sta L040C,x
|
||||||
|
.byte $9E
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb4 L000C
|
||||||
|
.byte $04
|
||||||
|
ldy #$0C
|
||||||
|
.byte $04
|
||||||
|
lda (L000C,x)
|
||||||
|
.byte $04
|
||||||
|
ldx #$0C
|
||||||
|
.byte $04
|
||||||
|
bbs5 a, L81F8
|
||||||
|
.byte $04
|
||||||
|
ldy L000C
|
||||||
|
.byte $04
|
||||||
|
lda L000C
|
||||||
|
.byte $04
|
||||||
|
ldx L000C
|
||||||
|
.byte $04
|
||||||
|
bbs5 L000C, L81FC
|
||||||
|
L81F8: tay
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $A9
|
||||||
|
L81FC: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
tax
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
seb5 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
ldy L040C
|
||||||
|
lda L040C
|
||||||
|
ldx L040C
|
||||||
|
seb5 L000C
|
||||||
|
.byte $04
|
||||||
|
bcs L821E
|
||||||
|
.byte $04
|
||||||
|
lda (L000C),y
|
||||||
|
.byte $04
|
||||||
|
jmp (L000C)
|
||||||
|
|
||||||
|
.byte $04
|
||||||
|
bbc5 a, L8228
|
||||||
|
.byte $04
|
||||||
|
ldy L000C,x
|
||||||
|
L821E: .byte $04
|
||||||
|
lda L000C,x
|
||||||
|
.byte $04
|
||||||
|
ldx L000C,y
|
||||||
|
.byte $04
|
||||||
|
bbc5 L000C, L822C
|
||||||
|
L8228: clv
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $B9
|
||||||
|
L822C: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
tsx
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb5 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
ldy L040C,x
|
||||||
|
lda L040C,x
|
||||||
|
ldx L040C,y
|
||||||
|
clb5 L000C
|
||||||
|
.byte $04
|
||||||
|
cpy #$0C
|
||||||
|
.byte $04
|
||||||
|
cmp (L000C,x)
|
||||||
|
.byte $04
|
||||||
|
slw
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbs6 a, L8258
|
||||||
|
.byte $04
|
||||||
|
cpy L000C
|
||||||
|
.byte $04
|
||||||
|
cmp L000C
|
||||||
|
.byte $04
|
||||||
|
dec L000C
|
||||||
|
.byte $04
|
||||||
|
bbs6 L000C, L825C
|
||||||
|
L8258: iny
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $C9
|
||||||
|
L825C: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
dex
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
seb6 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
cpy L040C
|
||||||
|
cmp L040C
|
||||||
|
dec L040C
|
||||||
|
seb6 L000C
|
||||||
|
.byte $04
|
||||||
|
bne L827E
|
||||||
|
.byte $04
|
||||||
|
cmp (L000C),y
|
||||||
|
.byte $04
|
||||||
|
.byte $D2
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbc6 a, L8288
|
||||||
|
.byte $04
|
||||||
|
.byte $D4
|
||||||
|
.byte $0C
|
||||||
|
L827E: .byte $04
|
||||||
|
cmp L000C,x
|
||||||
|
.byte $04
|
||||||
|
dec L000C,x
|
||||||
|
.byte $04
|
||||||
|
bbc6 L000C, L828C
|
||||||
|
L8288: cld
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $D9
|
||||||
|
L828C: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $DA
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb6 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $DC
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
cmp L040C,x
|
||||||
|
dec L040C,x
|
||||||
|
clb6 L000C
|
||||||
|
.byte $04
|
||||||
|
cpx #$0C
|
||||||
|
.byte $04
|
||||||
|
sbc (L000C,x)
|
||||||
|
.byte $04
|
||||||
|
fst
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbs7 a, L82B8
|
||||||
|
.byte $04
|
||||||
|
cpx L000C
|
||||||
|
.byte $04
|
||||||
|
sbc L000C
|
||||||
|
.byte $04
|
||||||
|
inc L000C
|
||||||
|
.byte $04
|
||||||
|
bbs7 L000C, L82BC
|
||||||
|
L82B8: inx
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $E9
|
||||||
|
L82BC: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
nop
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
seb7 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
cpx L040C
|
||||||
|
sbc L040C
|
||||||
|
inc L040C
|
||||||
|
seb7 L000C
|
||||||
|
.byte $04
|
||||||
|
beq L82DE
|
||||||
|
.byte $04
|
||||||
|
sbc (L000C),y
|
||||||
|
.byte $04
|
||||||
|
.byte $F2
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
bbc7 a, L82E8
|
||||||
|
.byte $04
|
||||||
|
.byte $F4
|
||||||
|
.byte $0C
|
||||||
|
L82DE: .byte $04
|
||||||
|
sbc L000C,x
|
||||||
|
.byte $04
|
||||||
|
inc L000C,x
|
||||||
|
.byte $04
|
||||||
|
bbc7 L000C, L82EC
|
||||||
|
L82E8: sed
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $F9
|
||||||
|
L82EC: .byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $FA
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
clb7 a
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
.byte $FC
|
||||||
|
.byte $0C
|
||||||
|
.byte $04
|
||||||
|
sbc L040C,x
|
||||||
|
inc L040C,x
|
||||||
|
clb7 L000C
|
||||||
|
.byte $04
|
||||||
|
|||||||
Reference in New Issue
Block a user