bslathi19/cc65
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Merge pull request #843 from polluks/patch-4

Browse Source 
Fixed 65C02 timing.
This commit is contained in:
Oliver Schmidt
2019-02-07 12:29:00 +01:00
committed by GitHub
parent 58484449b4 50fd96bbab
commit 3915323528
1 changed files with 12 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/sim65/6502.c
View File

@@ -37,8 +37,6 @@
BBRx, BBSx, RMBx, SMBx, WAI, and STP are unsupported BBRx, BBSx, RMBx, SMBx, WAI, and STP are unsupported
* BCD flag handling equals 6502 (unchecked if bug is simulated or wrong for * BCD flag handling equals 6502 (unchecked if bug is simulated or wrong for
6502) 6502)
* one cycle win for fetch-modify-write instructions ignored
(e.g., ROL abs,x takes only 6 cycles if no page break occurs)
*/ */
#include "memory.h" #include "memory.h"
@@ -629,6 +627,8 @@ static void OPC_6502_1E (void)
unsigned Val; unsigned Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr) << 1; Val = MemReadByte (Addr) << 1;
MemWriteByte (Addr, (unsigned char) Val); MemWriteByte (Addr, (unsigned char) Val);
TEST_ZF (Val & 0xFF); TEST_ZF (Val & 0xFF);
@@ -898,6 +898,8 @@ static void OPC_6502_3E (void)
unsigned Val; unsigned Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr); Val = MemReadByte (Addr);
ROL (Val); ROL (Val);
MemWriteByte (Addr, Val); MemWriteByte (Addr, Val);
@@ -1132,6 +1134,8 @@ static void OPC_6502_5E (void)
unsigned char Val; unsigned char Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr); Val = MemReadByte (Addr);
SET_CF (Val & 0x01); SET_CF (Val & 0x01);
Val >>= 1; Val >>= 1;
@@ -1462,6 +1466,8 @@ static void OPC_6502_7E (void)
unsigned Val; unsigned Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr); Val = MemReadByte (Addr);
ROR (Val); ROR (Val);
MemWriteByte (Addr, Val); MemWriteByte (Addr, Val);
@@ -2341,6 +2347,8 @@ static void OPC_6502_DE (void)
unsigned char Val; unsigned char Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr) - 1; Val = MemReadByte (Addr) - 1;
MemWriteByte (Addr, Val); MemWriteByte (Addr, Val);
TEST_ZF (Val); TEST_ZF (Val);
@@ -2648,6 +2656,8 @@ static void OPC_6502_FE (void)
unsigned char Val; unsigned char Val;
Cycles = 7; Cycles = 7;
Addr = MemReadWord (Regs.PC+1) + Regs.XR; Addr = MemReadWord (Regs.PC+1) + Regs.XR;
if (CPU != CPU_6502 && !PAGE_CROSS (Addr, Regs.XR))
--Cycles;
Val = MemReadByte (Addr) + 1; Val = MemReadByte (Addr) + 1;
MemWriteByte (Addr, Val); MemWriteByte (Addr, Val);
TEST_ZF (Val); TEST_ZF (Val);