Changed nameing convention of fields (now CamelCase), and improved comments.
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@@ -55,6 +55,9 @@ void PeripheralsWriteByte (uint8_t Addr, uint8_t Val)
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/* Write a byte to a memory location in the peripherals address aperture. */
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{
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switch (Addr) {
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/* Handle writes to the Counter peripheral. */
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case PERIPHERALS_COUNTER_ADDRESS_OFFSET_LATCH: {
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/* A write to the "latch" register performs a simultaneous latch of all registers. */
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@@ -63,29 +66,33 @@ void PeripheralsWriteByte (uint8_t Addr, uint8_t Val)
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int result = clock_gettime(CLOCK_REALTIME, &ts);
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if (result != 0) {
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/* Unable to read time. Report max uint64 value for both fields. */
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Peripherals.Counter.latched_wallclock_time = 0xffffffffffffffff;
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Peripherals.Counter.latched_wallclock_time_split = 0xffffffffffffffff;
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Peripherals.Counter.LatchedWallclockTime = 0xffffffffffffffff;
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Peripherals.Counter.LatchedWallclockTimeSplit = 0xffffffffffffffff;
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} else {
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/* Number of nanoseconds since 1-1-1970. */
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Peripherals.Counter.latched_wallclock_time = 1000000000u * ts.tv_sec + ts.tv_nsec;
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/* High word is number of seconds, low word is number of nanoseconds. */
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Peripherals.Counter.latched_wallclock_time_split = (ts.tv_sec << 32) | ts.tv_nsec;
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/* Wallclock time: number of nanoseconds since 1-1-1970. */
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Peripherals.Counter.LatchedWallclockTime = 1000000000u * ts.tv_sec + ts.tv_nsec;
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/* Wallclock time, split: high word is number of seconds since 1-1-1970,
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* low word is number of nanoseconds since the start of that second. */
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Peripherals.Counter.LatchedWallclockTimeSplit = (ts.tv_sec << 32) | ts.tv_nsec;
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}
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/* Latch the counters that reflect the state of the processor. */
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Peripherals.Counter.latched_clock_cycles = Peripherals.Counter.clock_cycles;
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Peripherals.Counter.latched_cpu_instructions = Peripherals.Counter.cpu_instructions;
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Peripherals.Counter.latched_irq_events = Peripherals.Counter.irq_events;
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Peripherals.Counter.latched_nmi_events = Peripherals.Counter.nmi_events;
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Peripherals.Counter.LatchedClockCycles = Peripherals.Counter.ClockCycles;
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Peripherals.Counter.LatchedCpuInstructions = Peripherals.Counter.CpuInstructions;
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Peripherals.Counter.LatchedIrqEvents = Peripherals.Counter.IrqEvents;
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Peripherals.Counter.LatchedNmiEvents = Peripherals.Counter.NmiEvents;
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break;
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}
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case PERIPHERALS_COUNTER_ADDRESS_OFFSET_SELECT: {
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/* Set the value of the visibility-selection register. */
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Peripherals.Counter.visible_latch_register = Val;
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Peripherals.Counter.LatchedValueSelected = Val;
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break;
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}
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/* Handle writes to unused and read-only peripheral addresses. */
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default: {
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/* Any other write is ignored */
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/* No action. */
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}
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}
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}
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@@ -96,8 +103,11 @@ uint8_t PeripheralsReadByte (uint8_t Addr)
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/* Read a byte from a memory location in the peripherals address aperture. */
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{
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switch (Addr) {
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/* Handle reads from the Counter peripheral. */
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case PERIPHERALS_COUNTER_ADDRESS_OFFSET_SELECT: {
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return Peripherals.Counter.visible_latch_register;
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return Peripherals.Counter.LatchedValueSelected;
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}
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case PERIPHERALS_COUNTER_ADDRESS_OFFSET_VALUE + 0:
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case PERIPHERALS_COUNTER_ADDRESS_OFFSET_VALUE + 1:
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@@ -110,22 +120,25 @@ uint8_t PeripheralsReadByte (uint8_t Addr)
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/* Read from any of the eight counter bytes.
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* The first byte is the 64 bit value's LSB, the seventh byte is its MSB.
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*/
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unsigned byte_select = Addr - PERIPHERALS_COUNTER_ADDRESS_OFFSET_VALUE; /* 0 .. 7 */
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uint64_t value;
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switch (Peripherals.Counter.visible_latch_register) {
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case PERIPHERALS_COUNTER_SELECT_CLOCKCYCLE_COUNTER: value = Peripherals.Counter.latched_clock_cycles; break;
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case PERIPHERALS_COUNTER_SELECT_INSTRUCTION_COUNTER: value = Peripherals.Counter.latched_cpu_instructions; break;
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case PERIPHERALS_COUNTER_SELECT_IRQ_COUNTER: value = Peripherals.Counter.latched_irq_events; break;
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case PERIPHERALS_COUNTER_SELECT_NMI_COUNTER: value = Peripherals.Counter.latched_nmi_events; break;
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case PERIPHERALS_COUNTER_SELECT_WALLCLOCK_TIME: value = Peripherals.Counter.latched_wallclock_time; break;
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case PERIPHERALS_COUNTER_SELECT_WALLCLOCK_TIME_SPLIT: value = Peripherals.Counter.latched_wallclock_time_split; break;
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default: value = 0; /* Reading from a non-existent register will yield 0. */
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unsigned ByteIndex = Addr - PERIPHERALS_COUNTER_ADDRESS_OFFSET_VALUE; /* 0 .. 7 */
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uint64_t Value;
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switch (Peripherals.Counter.LatchedValueSelected) {
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case PERIPHERALS_COUNTER_SELECT_CLOCKCYCLE_COUNTER: Value = Peripherals.Counter.LatchedClockCycles; break;
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case PERIPHERALS_COUNTER_SELECT_INSTRUCTION_COUNTER: Value = Peripherals.Counter.LatchedCpuInstructions; break;
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case PERIPHERALS_COUNTER_SELECT_IRQ_COUNTER: Value = Peripherals.Counter.LatchedIrqEvents; break;
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case PERIPHERALS_COUNTER_SELECT_NMI_COUNTER: Value = Peripherals.Counter.LatchedNmiEvents; break;
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case PERIPHERALS_COUNTER_SELECT_WALLCLOCK_TIME: Value = Peripherals.Counter.LatchedWallclockTime; break;
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case PERIPHERALS_COUNTER_SELECT_WALLCLOCK_TIME_SPLIT: Value = Peripherals.Counter.LatchedWallclockTimeSplit; break;
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default: Value = 0; /* Reading from a non-existent latch register will yield 0. */
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}
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/* Return the desired byte of the latched counter. 0==LSB, 7==MSB. */
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return value >> (byte_select * 8);
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return Value >> (ByteIndex * 8);
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}
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/* Handle reads from unused peripheral and write-only addresses. */
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default: {
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/* Any other read yields a zero value. */
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/* Return zero value. */
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return 0;
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}
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}
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@@ -136,19 +149,19 @@ uint8_t PeripheralsReadByte (uint8_t Addr)
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void PeripheralsInit (void)
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/* Initialize the peripherals. */
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{
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/* Initialize the COUNTER peripheral */
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/* Initialize the Counter peripheral */
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Peripherals.Counter.clock_cycles = 0;
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Peripherals.Counter.cpu_instructions = 0;
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Peripherals.Counter.irq_events = 0;
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Peripherals.Counter.nmi_events = 0;
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Peripherals.Counter.ClockCycles = 0;
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Peripherals.Counter.CpuInstructions = 0;
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Peripherals.Counter.IrqEvents = 0;
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Peripherals.Counter.NmiEvents = 0;
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Peripherals.Counter.latched_clock_cycles = 0;
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Peripherals.Counter.latched_cpu_instructions = 0;
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Peripherals.Counter.latched_irq_events = 0;
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Peripherals.Counter.latched_nmi_events = 0;
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Peripherals.Counter.latched_wallclock_time = 0;
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Peripherals.Counter.latched_wallclock_time_split = 0;
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Peripherals.Counter.LatchedClockCycles = 0;
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Peripherals.Counter.LatchedCpuInstructions = 0;
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Peripherals.Counter.LatchedIrqEvents = 0;
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Peripherals.Counter.LatchedNmiEvents = 0;
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Peripherals.Counter.LatchedWallclockTime = 0;
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Peripherals.Counter.LatchedWallclockTimeSplit = 0;
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Peripherals.Counter.visible_latch_register = 0;
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Peripherals.Counter.LatchedValueSelected = 0;
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}
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