fix m740, survives disasm/asm roundtrip now, still needs some work though
This commit is contained in:
mrdudz
@@ -214,7 +214,9 @@ void GetEA (EffAddr* A)
|
||||
break;
|
||||
|
||||
default:
|
||||
Error ("Syntax error");
|
||||
/* FIXME: syntax error if not zp, ind */
|
||||
A->AddrModeSet = AM65_ZP_REL;
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
|
||||
137
src/ca65/instr.c
137
src/ca65/instr.c
@@ -85,10 +85,10 @@ static void PutBlockTransfer (const InsDesc* Ins);
|
||||
static void PutBitBranch (const InsDesc* Ins);
|
||||
/* Handle 65C02 branch on bit condition */
|
||||
|
||||
static void PutBitBranchm740 (const InsDesc* Ins);
|
||||
static void PutBitBranch_m740 (const InsDesc* Ins);
|
||||
/* Handle m740 branch on bit condition */
|
||||
|
||||
static void PutLDMm740 (const InsDesc* Ins);
|
||||
static void PutLDM_m740 (const InsDesc* Ins);
|
||||
/* Handle m740 LDM instruction */
|
||||
|
||||
static void PutREP (const InsDesc* Ins);
|
||||
@@ -1056,41 +1056,49 @@ static const struct {
|
||||
/* Instruction table for the m740 CPU */
|
||||
static const struct {
|
||||
unsigned Count;
|
||||
InsDesc Ins[97];
|
||||
InsDesc Ins[106];
|
||||
} InsTabm740 = {
|
||||
sizeof (InsTabm740.Ins) / sizeof (InsTabm740.Ins[0]),
|
||||
{
|
||||
/* BEGIN SORTED.SH */
|
||||
{ "ADC", 0x080A26C, 0x60, 0, PutAll },
|
||||
{ "AND", 0x080A26C, 0x20, 0, PutAll },
|
||||
{ "ASL", 0x000006e, 0x02, 1, PutAll },
|
||||
{ "BBR0", 0x0000006, 0x13, 10, PutBitBranchm740 },
|
||||
{ "BBR1", 0x0000006, 0x33, 10, PutBitBranchm740 },
|
||||
{ "BBR2", 0x0000006, 0x53, 10, PutBitBranchm740 },
|
||||
{ "BBR3", 0x0000006, 0x73, 10, PutBitBranchm740 },
|
||||
{ "BBR4", 0x0000006, 0x93, 10, PutBitBranchm740 },
|
||||
{ "BBR5", 0x0000006, 0xb3, 10, PutBitBranchm740 },
|
||||
{ "BBR6", 0x0000006, 0xd3, 10, PutBitBranchm740 },
|
||||
{ "BBR7", 0x0000006, 0xf3, 10, PutBitBranchm740 },
|
||||
{ "BBS0", 0x0000006, 0x03, 10, PutBitBranchm740 },
|
||||
{ "BBS1", 0x0000006, 0x23, 10, PutBitBranchm740 },
|
||||
{ "BBS2", 0x0000006, 0x43, 10, PutBitBranchm740 },
|
||||
{ "BBS3", 0x0000006, 0x63, 10, PutBitBranchm740 },
|
||||
{ "BBS4", 0x0000006, 0x83, 10, PutBitBranchm740 },
|
||||
{ "BBS5", 0x0000006, 0xa3, 10, PutBitBranchm740 },
|
||||
{ "BBS6", 0x0000006, 0xc3, 10, PutBitBranchm740 },
|
||||
{ "BBS7", 0x0000006, 0xe3, 10, PutBitBranchm740 },
|
||||
{ "BCC", 0x0020000, 0x90, 0, PutPCRel8 },
|
||||
{ "BCS", 0x0020000, 0xb0, 0, PutPCRel8 },
|
||||
{ "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 },
|
||||
{ "BIT", 0x000000C, 0x00, 2, PutAll },
|
||||
{ "BMI", 0x0020000, 0x30, 0, PutPCRel8 },
|
||||
{ "BNE", 0x0020000, 0xd0, 0, PutPCRel8 },
|
||||
{ "BPL", 0x0020000, 0x10, 0, PutPCRel8 },
|
||||
{ "BRA", 0x0020000, 0x80, 0, PutPCRel8 },
|
||||
{ "BRK", 0x0000001, 0x00, 0, PutAll },
|
||||
{ "BVC", 0x0020000, 0x50, 0, PutPCRel8 },
|
||||
{ "BVS", 0x0020000, 0x70, 0, PutPCRel8 },
|
||||
{ "ADC", 0x0080A26C, 0x60, 0, PutAll },
|
||||
{ "AND", 0x0080A26C, 0x20, 0, PutAll },
|
||||
{ "ASL", 0x0000006e, 0x02, 1, PutAll },
|
||||
{ "BBC0", 0x10000002, 0x13, 10, PutBitBranch_m740 },
|
||||
{ "BBC1", 0x10000002, 0x33, 10, PutBitBranch_m740 },
|
||||
{ "BBC2", 0x10000002, 0x53, 10, PutBitBranch_m740 },
|
||||
{ "BBC3", 0x10000002, 0x73, 10, PutBitBranch_m740 },
|
||||
{ "BBC4", 0x10000002, 0x93, 10, PutBitBranch_m740 },
|
||||
{ "BBC5", 0x10000002, 0xb3, 10, PutBitBranch_m740 },
|
||||
{ "BBC6", 0x10000002, 0xd3, 10, PutBitBranch_m740 },
|
||||
{ "BBC7", 0x10000002, 0xf3, 10, PutBitBranch_m740 },
|
||||
{ "BBS0", 0x10000002, 0x03, 10, PutBitBranch_m740 },
|
||||
{ "BBS1", 0x10000002, 0x23, 10, PutBitBranch_m740 },
|
||||
{ "BBS2", 0x10000002, 0x43, 10, PutBitBranch_m740 },
|
||||
{ "BBS3", 0x10000002, 0x63, 10, PutBitBranch_m740 },
|
||||
{ "BBS4", 0x10000002, 0x83, 10, PutBitBranch_m740 },
|
||||
{ "BBS5", 0x10000002, 0xa3, 10, PutBitBranch_m740 },
|
||||
{ "BBS6", 0x10000002, 0xc3, 10, PutBitBranch_m740 },
|
||||
{ "BBS7", 0x10000002, 0xe3, 10, PutBitBranch_m740 },
|
||||
{ "BCC", 0x00020000, 0x90, 0, PutPCRel8 },
|
||||
{ "BCS", 0x00020000, 0xb0, 0, PutPCRel8 },
|
||||
{ "BEQ", 0x00020000, 0xf0, 0, PutPCRel8 },
|
||||
{ "BIT", 0x0000000C, 0x00, 2, PutAll },
|
||||
{ "BMI", 0x00020000, 0x30, 0, PutPCRel8 },
|
||||
{ "BNE", 0x00020000, 0xd0, 0, PutPCRel8 },
|
||||
{ "BPL", 0x00020000, 0x10, 0, PutPCRel8 },
|
||||
{ "BRA", 0x00020000, 0x80, 0, PutPCRel8 },
|
||||
{ "BRK", 0x00000001, 0x00, 0, PutAll },
|
||||
{ "BVC", 0x00020000, 0x50, 0, PutPCRel8 },
|
||||
{ "BVS", 0x00020000, 0x70, 0, PutPCRel8 },
|
||||
{ "CLB0", 0x0000006, 0x1b, 10, PutAll },
|
||||
{ "CLB1", 0x0000006, 0x3b, 10, PutAll },
|
||||
{ "CLB2", 0x0000006, 0x5b, 10, PutAll },
|
||||
{ "CLB3", 0x0000006, 0x7b, 10, PutAll },
|
||||
{ "CLB4", 0x0000006, 0x9b, 10, PutAll },
|
||||
{ "CLB5", 0x0000006, 0xbb, 10, PutAll },
|
||||
{ "CLB6", 0x0000006, 0xdb, 10, PutAll },
|
||||
{ "CLB7", 0x0000006, 0xfb, 10, PutAll },
|
||||
{ "CLC", 0x0000001, 0x18, 0, PutAll },
|
||||
{ "CLD", 0x0000001, 0xd8, 0, PutAll },
|
||||
{ "CLI", 0x0000001, 0x58, 0, PutAll },
|
||||
@@ -1111,7 +1119,7 @@ static const struct {
|
||||
{ "JMP", 0x0000C08, 0x00, 12, PutAll },
|
||||
{ "JSR", 0x0080808, 0x00, 13, PutAll },
|
||||
{ "LDA", 0x080A26C, 0xa0, 0, PutAll },
|
||||
{ "LDM", 0x0000004, 0x3c, 6, PutLDMm740 },
|
||||
{ "LDM", 0x10000000, 0x3c, 0, PutLDM_m740 },
|
||||
{ "LDX", 0x080030C, 0xa2, 1, PutAll },
|
||||
{ "LDY", 0x080006C, 0xa0, 1, PutAll },
|
||||
{ "LSR", 0x000006F, 0x42, 1, PutAll },
|
||||
@@ -1135,25 +1143,26 @@ static const struct {
|
||||
{ "RTI", 0x0000001, 0x40, 0, PutAll },
|
||||
{ "RTS", 0x0000001, 0x60, 0, PutAll },
|
||||
{ "SBC", 0x080A26C, 0xe0, 0, PutAll },
|
||||
{ "SEB0", 0x0000006, 0x0b, 10, PutAll },
|
||||
{ "SEB1", 0x0000006, 0x2b, 10, PutAll },
|
||||
{ "SEB2", 0x0000006, 0x4b, 10, PutAll },
|
||||
{ "SEB3", 0x0000006, 0x6b, 10, PutAll },
|
||||
{ "SEB4", 0x0000006, 0x8b, 10, PutAll },
|
||||
{ "SEB5", 0x0000006, 0xab, 10, PutAll },
|
||||
{ "SEB6", 0x0000006, 0xcb, 10, PutAll },
|
||||
{ "SEB7", 0x0000006, 0xeb, 10, PutAll },
|
||||
{ "SEC", 0x0000001, 0x38, 0, PutAll },
|
||||
{ "SED", 0x0000001, 0xf8, 0, PutAll },
|
||||
{ "SEI", 0x0000001, 0x78, 0, PutAll },
|
||||
{ "SET", 0x0000001, 0x32, 0, PutAll },
|
||||
{ "SLW", 0x0000001, 0xC2, 0, PutAll },
|
||||
{ "SMB0", 0x0000006, 0x0b, 10, PutAll },
|
||||
{ "SMB1", 0x0000006, 0x2b, 10, PutAll },
|
||||
{ "SMB2", 0x0000006, 0x4b, 10, PutAll },
|
||||
{ "SMB3", 0x0000006, 0x6b, 10, PutAll },
|
||||
{ "SMB4", 0x0000006, 0x8b, 10, PutAll },
|
||||
{ "SMB5", 0x0000006, 0xab, 10, PutAll },
|
||||
{ "SMB6", 0x0000006, 0xcb, 10, PutAll },
|
||||
{ "SMB7", 0x0000006, 0xeb, 10, PutAll },
|
||||
{ "STA", 0x000A26C, 0x80, 0, PutAll },
|
||||
{ "STP", 0x0000001, 0x42, 0, PutAll },
|
||||
{ "STX", 0x000010c, 0x82, 1, PutAll },
|
||||
{ "STY", 0x000002c, 0x80, 1, PutAll },
|
||||
{ "TAX", 0x0000001, 0xaa, 0, PutAll },
|
||||
{ "TAY", 0x0000001, 0xa8, 0, PutAll },
|
||||
{ "TST", 0x0000004, 0x64, 0, PutAll },
|
||||
{ "TSX", 0x0000001, 0xba, 0, PutAll },
|
||||
{ "TXA", 0x0000001, 0x8a, 0, PutAll },
|
||||
{ "TXS", 0x0000001, 0x9a, 0, PutAll },
|
||||
@@ -1486,13 +1495,21 @@ static void EmitCode (EffAddr* A)
|
||||
}
|
||||
|
||||
|
||||
static void PutLDMm740 (const InsDesc* Ins)
|
||||
static void PutLDM_m740 (const InsDesc* Ins)
|
||||
{
|
||||
|
||||
EffAddr A;
|
||||
/* Evaluate the addressing mode */
|
||||
if (EvalEA (Ins, &A) == 0) {
|
||||
/* An error occurred */
|
||||
return;
|
||||
}
|
||||
Emit0 (Ins->BaseCode);
|
||||
EmitWord (Expression ());
|
||||
EmitByte (A.Expr);
|
||||
Consume (TOK_HASH, "'#' expected");
|
||||
EmitByte (Expression ());
|
||||
}
|
||||
|
||||
|
||||
static long PutImmed8 (const InsDesc* Ins)
|
||||
/* Parse and emit an immediate 8 bit instruction. Return the value of the
|
||||
** operand if it's available and const.
|
||||
@@ -1612,21 +1629,29 @@ static void PutBitBranch (const InsDesc* Ins)
|
||||
EmitSigned (GenBranchExpr (1), 1);
|
||||
}
|
||||
|
||||
static void PutBitBranchm740 (const InsDesc* Ins)
|
||||
/* Handle 65C02 branch on bit condition */
|
||||
static void PutBitBranch_m740 (const InsDesc* Ins)
|
||||
/* Handle m740 branch on bit condition */
|
||||
{
|
||||
EffAddr A;
|
||||
|
||||
/* HACK: hardcoded for zp addressing mode, this doesn't work all the time */
|
||||
A.AddrMode = 2;
|
||||
|
||||
A.Opcode = Ins->BaseCode | EATab[Ins->ExtCode][A.AddrMode];
|
||||
/* Evaluate the addressing mode used */
|
||||
/* No error, output code */
|
||||
Emit0 (A.Opcode);
|
||||
EmitByte (Expression ());
|
||||
ConsumeComma ();
|
||||
EmitSigned (GenBranchExpr (1), 1);
|
||||
GetEA(&A);
|
||||
|
||||
A.AddrMode = 2; /* HACK */
|
||||
A.Opcode = Ins->BaseCode;
|
||||
|
||||
if (A.AddrModeSet == 0x00000002) {
|
||||
/* Accu */
|
||||
Emit0 (A.Opcode);
|
||||
ConsumeComma ();
|
||||
EmitSigned (GenBranchExpr (1), 1);
|
||||
} else if (A.AddrModeSet == 0x10000000) {
|
||||
A.Opcode += 0x04;
|
||||
/* Zeropage */
|
||||
Emit0 (A.Opcode);
|
||||
EmitByte (A.Expr);
|
||||
EmitSigned (GenBranchExpr (1), 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -86,6 +86,9 @@
|
||||
#define AM65_BLOCKXFER 0x02000000UL /* -- */
|
||||
#define AM65_ABS_IND_LONG 0x04000000UL /* -- */
|
||||
#define AM65_IMM_IMPLICIT_WORD 0x08000000UL /* PHW #$1234 (4510 only) */
|
||||
#define AM65_ZP_REL 0x10000000UL /* ZP, REL (m740) */
|
||||
|
||||
|
||||
|
||||
/* Bitmask for all ZP operations that have correspondent ABS ops */
|
||||
/* $8524 */
|
||||
|
||||
@@ -92,6 +92,29 @@ static void OneLine (const OpcDesc* D, const char* Arg, ...)
|
||||
LineFeed ();
|
||||
}
|
||||
|
||||
static void OneLineNoIndent (const OpcDesc* D, const char* Arg, ...) attribute ((format(printf, 2, 3)));
|
||||
static void OneLineNoIndent (const OpcDesc* D, const char* Arg, ...)
|
||||
/* Output one line with the given mnemonic and argument */
|
||||
{
|
||||
char Buf [256];
|
||||
va_list ap;
|
||||
|
||||
/* Mnemonic */
|
||||
Mnemonic (D->Mnemo);
|
||||
|
||||
/* Argument */
|
||||
va_start (ap, Arg);
|
||||
xvsprintf (Buf, sizeof (Buf), Arg, ap);
|
||||
va_end (ap);
|
||||
|
||||
Output ("%s", Buf);
|
||||
|
||||
/* Add the code stuff as comment */
|
||||
LineComment (PC, D->Size);
|
||||
|
||||
/* End the line */
|
||||
LineFeed ();
|
||||
}
|
||||
|
||||
|
||||
static const char* GetAbsOverride (unsigned Flags, unsigned Addr)
|
||||
@@ -531,7 +554,7 @@ void OH_BitBranch (const OpcDesc* D)
|
||||
xfree (BranchLabel);
|
||||
}
|
||||
|
||||
void OH_BitBranchm740 (const OpcDesc* D)
|
||||
void OH_BitBranch_m740 (const OpcDesc* D)
|
||||
{
|
||||
unsigned Bit = GetCodeByte (PC) >> 5;
|
||||
unsigned Addr = GetCodeByte (PC+1);
|
||||
@@ -545,7 +568,7 @@ void OH_BitBranchm740 (const OpcDesc* D)
|
||||
GenerateLabel (flLabel, BranchAddr);
|
||||
|
||||
/* Output the line */
|
||||
OneLine (D, "%01X,%s,%s", Bit, GetAddrArg (D->Flags, Addr), GetAddrArg (flLabel, BranchAddr));
|
||||
OneLineNoIndent (D, "%01X %s,%s", Bit, GetAddrArg (D->Flags, Addr), GetAddrArg (flLabel, BranchAddr));
|
||||
}
|
||||
|
||||
void OH_ImmediateDirect (const OpcDesc* D)
|
||||
@@ -743,7 +766,7 @@ void OH_ZeroPageBit (const OpcDesc* D)
|
||||
GenerateLabel (D->Flags, Addr);
|
||||
|
||||
/* Output the line */
|
||||
OneLine (D, "%01X,%s", Bit, GetAddrArg (D->Flags, Addr));
|
||||
OneLineNoIndent (D, "%01X %s", Bit, GetAddrArg (D->Flags, Addr));
|
||||
}
|
||||
|
||||
|
||||
@@ -753,7 +776,7 @@ void OH_AccumulatorBit (const OpcDesc* D)
|
||||
unsigned Bit = GetCodeByte (PC) >> 5;
|
||||
|
||||
/* Output the line */
|
||||
OneLine (D, "%01X,a", Bit);
|
||||
OneLineNoIndent (D, "%01X a", Bit);
|
||||
}
|
||||
|
||||
|
||||
@@ -770,7 +793,7 @@ void OH_AccumulatorBitBranch (const OpcDesc* D)
|
||||
GenerateLabel (flLabel, BranchAddr);
|
||||
|
||||
/* Output the line */
|
||||
OneLine (D, "%01X,a,%s", Bit, GetAddrArg (flLabel, BranchAddr));
|
||||
OneLineNoIndent (D, "%01X a, %s", Bit, GetAddrArg (flLabel, BranchAddr));
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -78,7 +78,7 @@ void OH_DirectXIndirect (const OpcDesc*);
|
||||
void OH_AbsoluteIndirect (const OpcDesc*);
|
||||
|
||||
void OH_BitBranch (const OpcDesc*);
|
||||
void OH_BitBranchm740 (const OpcDesc*);
|
||||
void OH_BitBranch_m740 (const OpcDesc*);
|
||||
|
||||
void OH_ImmediateDirect (const OpcDesc*);
|
||||
void OH_ImmediateDirectX (const OpcDesc*);
|
||||
|
||||
@@ -55,7 +55,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $04 */
|
||||
{ "ora", 2, flUseLabel, OH_Direct }, /* $05 */
|
||||
{ "asl", 2, flUseLabel, OH_Direct }, /* $06 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $07 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $07 */
|
||||
{ "php", 1, flNone, OH_Implicit }, /* $08 */
|
||||
{ "ora", 2, flNone, OH_Immediate }, /* $09 */
|
||||
{ "asl", 1, flNone, OH_Accumulator }, /* $0a */
|
||||
@@ -71,7 +71,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $14 */
|
||||
{ "ora", 2, flUseLabel, OH_DirectX }, /* $15 */
|
||||
{ "asl", 2, flUseLabel, OH_DirectX }, /* $16 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $17 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $17 */
|
||||
{ "clc", 1, flNone, OH_Implicit }, /* $18 */
|
||||
{ "ora", 3, flUseLabel, OH_AbsoluteY }, /* $19 */
|
||||
{ "dec", 1, flNone, OH_Accumulator }, /* $1a */
|
||||
@@ -87,7 +87,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "bit", 2, flUseLabel, OH_Direct }, /* $24 */
|
||||
{ "and", 2, flUseLabel, OH_Direct }, /* $25 */
|
||||
{ "rol", 2, flUseLabel, OH_Direct }, /* $26 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $27 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $27 */
|
||||
{ "plp", 1, flNone, OH_Implicit }, /* $28 */
|
||||
{ "and", 2, flNone, OH_Immediate }, /* $29 */
|
||||
{ "rol", 1, flNone, OH_Accumulator }, /* $2a */
|
||||
@@ -103,7 +103,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $34 */
|
||||
{ "and", 2, flUseLabel, OH_DirectX }, /* $35 */
|
||||
{ "rol", 2, flUseLabel, OH_DirectX }, /* $36 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $37 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $37 */
|
||||
{ "sec", 1, flNone, OH_Implicit }, /* $38 */
|
||||
{ "and", 3, flUseLabel, OH_AbsoluteY }, /* $39 */
|
||||
{ "inc", 1, flNone, OH_Accumulator }, /* $3a */
|
||||
@@ -119,7 +119,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "com", 2, flUseLabel, OH_Direct }, /* $44 */
|
||||
{ "eor", 2, flUseLabel, OH_Direct }, /* $45 */
|
||||
{ "lsr", 2, flUseLabel, OH_Direct }, /* $46 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $47 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $47 */
|
||||
{ "pha", 1, flNone, OH_Implicit }, /* $48 */
|
||||
{ "eor", 2, flNone, OH_Immediate }, /* $49 */
|
||||
{ "lsr", 1, flNone, OH_Accumulator }, /* $4a */
|
||||
@@ -135,7 +135,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $54 */
|
||||
{ "eor", 2, flUseLabel, OH_DirectX }, /* $55 */
|
||||
{ "lsr", 2, flUseLabel, OH_DirectX }, /* $56 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $57 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $57 */
|
||||
{ "cli", 1, flNone, OH_Implicit }, /* $58 */
|
||||
{ "eor", 3, flUseLabel, OH_AbsoluteY }, /* $59 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $5a */
|
||||
@@ -146,12 +146,12 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $5f */
|
||||
{ "rts", 1, flNone, OH_Rts }, /* $60 */
|
||||
{ "adc", 2, flUseLabel, OH_DirectXIndirect }, /* $61 */
|
||||
{ "mul", 2, flUseLabel, OH_DirectX }, /* $62 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $62 */
|
||||
{ "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $63 */
|
||||
{ "tst", 2, flUseLabel, OH_Direct }, /* $64 */
|
||||
{ "adc", 2, flUseLabel, OH_Direct }, /* $65 */
|
||||
{ "ror", 2, flUseLabel, OH_Direct }, /* $66 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $67 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $67 */
|
||||
{ "pla", 1, flNone, OH_Implicit }, /* $68 */
|
||||
{ "adc", 2, flNone, OH_Immediate }, /* $69 */
|
||||
{ "ror", 1, flNone, OH_Accumulator }, /* $6a */
|
||||
@@ -167,7 +167,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $74 */
|
||||
{ "adc", 2, flUseLabel, OH_DirectX }, /* $75 */
|
||||
{ "ror", 2, flUseLabel, OH_DirectX }, /* $76 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $77 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $77 */
|
||||
{ "sei", 1, flNone, OH_Implicit }, /* $78 */
|
||||
{ "adc", 3, flUseLabel, OH_AbsoluteY }, /* $79 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $7a */
|
||||
@@ -183,7 +183,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "sty", 2, flUseLabel, OH_Direct }, /* $84 */
|
||||
{ "sta", 2, flUseLabel, OH_Direct }, /* $85 */
|
||||
{ "stx", 2, flUseLabel, OH_Direct }, /* $86 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $87 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $87 */
|
||||
{ "dey", 1, flNone, OH_Implicit }, /* $88 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $89 */
|
||||
{ "txa", 1, flNone, OH_Implicit }, /* $8a */
|
||||
@@ -199,7 +199,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "sty", 2, flUseLabel, OH_DirectX }, /* $94 */
|
||||
{ "sta", 2, flUseLabel, OH_DirectX }, /* $95 */
|
||||
{ "stx", 2, flUseLabel, OH_DirectY }, /* $96 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $97 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $97 */
|
||||
{ "tya", 1, flNone, OH_Implicit }, /* $98 */
|
||||
{ "sta", 3, flUseLabel, OH_AbsoluteY }, /* $99 */
|
||||
{ "txs", 1, flNone, OH_Implicit }, /* $9a */
|
||||
@@ -215,7 +215,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "ldy", 2, flUseLabel, OH_Direct }, /* $a4 */
|
||||
{ "lda", 2, flUseLabel, OH_Direct }, /* $a5 */
|
||||
{ "ldx", 2, flUseLabel, OH_Direct }, /* $a6 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $a7 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $a7 */
|
||||
{ "tay", 1, flNone, OH_Implicit }, /* $a8 */
|
||||
{ "lda", 2, flNone, OH_Immediate }, /* $a9 */
|
||||
{ "tax", 1, flNone, OH_Implicit }, /* $aa */
|
||||
@@ -231,7 +231,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "ldy", 2, flUseLabel, OH_DirectX }, /* $b4 */
|
||||
{ "lda", 2, flUseLabel, OH_DirectX }, /* $b5 */
|
||||
{ "ldx", 2, flUseLabel, OH_DirectY }, /* $b6 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $b7 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $b7 */
|
||||
{ "clv", 1, flNone, OH_Implicit }, /* $b8 */
|
||||
{ "lda", 3, flUseLabel, OH_AbsoluteY }, /* $b9 */
|
||||
{ "tsx", 1, flNone, OH_Implicit }, /* $ba */
|
||||
@@ -242,12 +242,12 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $bf */
|
||||
{ "cpy", 2, flNone, OH_Immediate }, /* $c0 */
|
||||
{ "cmp", 2, flUseLabel, OH_DirectXIndirect }, /* $c1 */
|
||||
{ "wit", 1, flNone, OH_Implicit, }, /* $c2 */
|
||||
{ "slw", 1, flNone, OH_Implicit, }, /* $c2 */
|
||||
{ "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $c3 */
|
||||
{ "cpy", 2, flUseLabel, OH_Direct }, /* $c4 */
|
||||
{ "cmp", 2, flUseLabel, OH_Direct }, /* $c5 */
|
||||
{ "dec", 2, flUseLabel, OH_Direct }, /* $c6 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $c7 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $c7 */
|
||||
{ "iny", 1, flNone, OH_Implicit }, /* $c8 */
|
||||
{ "cmp", 2, flNone, OH_Immediate }, /* $c9 */
|
||||
{ "dex", 1, flNone, OH_Implicit }, /* $ca */
|
||||
@@ -263,7 +263,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $d4 */
|
||||
{ "cmp", 2, flUseLabel, OH_DirectX }, /* $d5 */
|
||||
{ "dec", 2, flUseLabel, OH_DirectX }, /* $d6 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $d7 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $d7 */
|
||||
{ "cld", 1, flNone, OH_Implicit }, /* $d8 */
|
||||
{ "cmp", 3, flUseLabel, OH_AbsoluteY }, /* $d9 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $da */
|
||||
@@ -274,12 +274,12 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "clb", 2, flUseLabel, OH_ZeroPageBit }, /* $df */
|
||||
{ "cpx", 2, flNone, OH_Immediate }, /* $e0 */
|
||||
{ "sbc", 2, flUseLabel, OH_DirectXIndirect }, /* $e1 */
|
||||
{ "div", 2, flUseLabel, OH_DirectX }, /* $e2 */
|
||||
{ "fst", 1, flNone, OH_Implicit }, /* $e2 */
|
||||
{ "bbs", 2, flUseLabel, OH_AccumulatorBitBranch }, /* $e3 */
|
||||
{ "cpx", 2, flUseLabel, OH_Direct }, /* $e4 */
|
||||
{ "sbc", 2, flUseLabel, OH_Direct }, /* $e5 */
|
||||
{ "inc", 2, flUseLabel, OH_Direct }, /* $e6 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranchm740 }, /* $e7 */
|
||||
{ "bbs", 3, flUseLabel, OH_BitBranch_m740 }, /* $e7 */
|
||||
{ "inx", 1, flNone, OH_Implicit }, /* $e8 */
|
||||
{ "sbc", 2, flNone, OH_Immediate }, /* $e9 */
|
||||
{ "nop", 1, flNone, OH_Implicit }, /* $ea */
|
||||
@@ -295,7 +295,7 @@ const OpcDesc OpcTable_M740[256] = {
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $f4 */
|
||||
{ "sbc", 2, flUseLabel, OH_DirectX }, /* $f5 */
|
||||
{ "inc", 2, flUseLabel, OH_DirectX }, /* $f6 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranchm740 }, /* $f7 */
|
||||
{ "bbc", 3, flUseLabel, OH_BitBranch_m740 }, /* $f7 */
|
||||
{ "sed", 1, flNone, OH_Implicit }, /* $f8 */
|
||||
{ "sbc", 3, flUseLabel, OH_AbsoluteY }, /* $f9 */
|
||||
{ "", 1, flIllegal, OH_Illegal }, /* $fa */
|
||||
|
||||
Reference in New Issue
Block a user