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Added new CPU SWEET16

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git-svn-id: svn://svn.cc65.org/cc65/trunk@3208 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
cuz
2004-10-03 21:26:00 +00:00
parent 7d72f47fe6
commit 7d0eb0d3ff
14 changed files with 785 additions and 78 deletions
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92
src/ca65/instr.h
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@@ -6,7 +6,7 @@
/* */
/* */
/* */
/* (C) 1998-2003 Ullrich von Bassewitz */
/* (C) 1998-2004 Ullrich von Bassewitz */
/* R<>merstrasse 52 */
/* D-70794 Filderstadt */
/* EMail: uz@cc65.org */
@@ -44,7 +44,7 @@
/*****************************************************************************/
/* Data */
/* Data for 6502 and successors */
/*****************************************************************************/
@@ -57,43 +57,43 @@
* When assembling for the 6502 or 65C02, all addressing modes that are not
* available on these CPUs are removed before doing any checks.
*/
#define AM_IMPLICIT 0x00000003UL
#define AM_ACCU 0x00000002UL
#define AM_DIR 0x00000004UL
#define AM_ABS 0x00000008UL
#define AM_ABS_LONG 0x00000010UL
#define AM_DIR_X 0x00000020UL
#define AM_ABS_X 0x00000040UL
#define AM_ABS_LONG_X 0x00000080UL
#define AM_DIR_Y 0x00000100UL
#define AM_ABS_Y 0x00000200UL
#define AM_DIR_IND 0x00000400UL
#define AM_ABS_IND 0x00000800UL
#define AM_DIR_IND_LONG 0x00001000UL
#define AM_DIR_IND_Y 0x00002000UL
#define AM_DIR_IND_LONG_Y 0x00004000UL
#define AM_DIR_X_IND 0x00008000UL
#define AM_ABS_X_IND 0x00010000UL
#define AM_REL 0x00020000UL
#define AM_REL_LONG 0x00040000UL
#define AM_STACK_REL 0x00080000UL
#define AM_STACK_REL_IND_Y 0x00100000UL
#define AM_IMM_ACCU 0x00200000UL
#define AM_IMM_INDEX 0x00400000UL
#define AM_IMM_IMPLICIT 0x00800000UL
#define AM_IMM (AM_IMM_ACCU | AM_IMM_INDEX | AM_IMM_IMPLICIT)
#define AM_BLOCKMOVE 0x01000000UL
#define AM65_IMPLICIT 0x00000003UL
#define AM65_ACCU 0x00000002UL
#define AM65_DIR 0x00000004UL
#define AM65_ABS 0x00000008UL
#define AM65_ABS_LONG 0x00000010UL
#define AM65_DIR_X 0x00000020UL
#define AM65_ABS_X 0x00000040UL
#define AM65_ABS_LONG_X 0x00000080UL
#define AM65_DIR_Y 0x00000100UL
#define AM65_ABS_Y 0x00000200UL
#define AM65_DIR_IND 0x00000400UL
#define AM65_ABS_IND 0x00000800UL
#define AM65_DIR_IND_LONG 0x00001000UL
#define AM65_DIR_IND_Y 0x00002000UL
#define AM65_DIR_IND_LONG_Y 0x00004000UL
#define AM65_DIR_X_IND 0x00008000UL
#define AM65_ABS_X_IND 0x00010000UL
#define AM65_REL 0x00020000UL
#define AM65_REL_LONG 0x00040000UL
#define AM65_STACK_REL 0x00080000UL
#define AM65_STACK_REL_IND_Y 0x00100000UL
#define AM65_IMM_ACCU 0x00200000UL
#define AM65_IMM_INDEX 0x00400000UL
#define AM65_IMM_IMPLICIT 0x00800000UL
#define AM65_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT)
#define AM65_BLOCKMOVE 0x01000000UL
/* Bitmask for all ZP operations that have correspondent ABS ops */
#define AM_SET_ZP (AM_DIR | AM_DIR_X | AM_DIR_Y | AM_DIR_IND | AM_DIR_X_IND)
#define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
/* Bitmask for all ABS operations that have correspondent FAR ops */
#define AM_SET_ABS (AM_ABS | AM_ABS_X)
#define AM65_SET_ABS (AM65_ABS | AM65_ABS_X)
/* Bit numbers and count */
#define AMI_IMM_ACCU 21
#define AMI_IMM_INDEX 22
#define AMI_COUNT 25
#define AM65I_IMM_ACCU 21
#define AM65I_IMM_INDEX 22
#define AM65I_COUNT 25
@@ -117,18 +117,30 @@ struct InsTable {
/* The instruction table for the currently active CPU */
extern const InsTable* InsTab;
/* Table to build the effective opcode from a base opcode and an addressing
* mode.
*/
extern unsigned char EATab [9][AMI_COUNT];
/* Table that encodes the additional bytes for each instruction */
extern unsigned char ExtBytes [AMI_COUNT];
extern unsigned char ExtBytes[AM65I_COUNT];
/*****************************************************************************/
/* Code */
/* Data for the SWEET16 pseudo CPU */
/*****************************************************************************/
/* SWEET16 addressing modes */
#define AMSW16_IMP 0x0001 /* Implicit */
#define AMSW16_BRA 0x0002 /* A branch */
#define AMSW16_IMM 0x0004 /* Immediate */
#define AMSW16_IND 0x0008 /* Indirect */
#define AMSW16_REG 0x0010 /* Register */
#define AMSW16I_COUNT 5 /* Number of addressing modes */
/*****************************************************************************/
/* Code */
/*****************************************************************************/