Removed (pretty inconsistently used) tab chars from source code base.
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@@ -7,20 +7,20 @@
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.export _exit
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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.import initlib, donelib, callmain
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.import push0, _main, zerobss, copydata
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.import initlib, donelib, callmain
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.import push0, _main, zerobss, copydata
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.import ppubuf_flush
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; Linker generated symbols
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.import __RAM_START__, __RAM_SIZE__
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.import __SRAM_START__, __SRAM_SIZE__
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.import __ROM0_START__, __ROM0_SIZE__
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.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__
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.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__
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.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__
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.import __RAM_START__, __RAM_SIZE__
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.import __SRAM_START__, __SRAM_SIZE__
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.import __ROM0_START__, __ROM0_SIZE__
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.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__
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.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__
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.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__
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.include "zeropage.inc"
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.include "nes.inc"
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.include "nes.inc"
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; ------------------------------------------------------------------------
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@@ -55,18 +55,18 @@
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; | ..-EOF | | CHR-ROM pages (in ascending order). |
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; +--------+------+------------------------------------------+
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.byte $4e,$45,$53,$1a ; "NES"^Z
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.byte 2 ; ines prg - Specifies the number of 16k prg banks.
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.byte 1 ; ines chr - Specifies the number of 8k chr banks.
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.byte %00000011 ; ines mir - Specifies VRAM mirroring of the banks.
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.byte %00000000 ; ines map - Specifies the NES mapper used.
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.byte 0,0,0,0,0,0,0,0 ; 8 zeroes
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.byte $4e,$45,$53,$1a ; "NES"^Z
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.byte 2 ; ines prg - Specifies the number of 16k prg banks.
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.byte 1 ; ines chr - Specifies the number of 8k chr banks.
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.byte %00000011 ; ines mir - Specifies VRAM mirroring of the banks.
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.byte %00000000 ; ines map - Specifies the NES mapper used.
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.byte 0,0,0,0,0,0,0,0 ; 8 zeroes
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; ------------------------------------------------------------------------
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; Place the startup code in a special segment.
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.segment "STARTUP"
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.segment "STARTUP"
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start:
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@@ -74,51 +74,51 @@ start:
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sei
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cld
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ldx #0
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stx VBLANK_FLAG
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ldx #0
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stx VBLANK_FLAG
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stx ringread
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stx ringwrite
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stx ringcount
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stx ringread
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stx ringwrite
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stx ringcount
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txs
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lda #$20
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@l: sta ringbuff,x
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sta ringbuff+$0100,x
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sta ringbuff+$0200,x
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sta ringbuff+$0100,x
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sta ringbuff+$0200,x
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inx
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bne @l
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bne @l
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; Clear the BSS data
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jsr zerobss
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jsr zerobss
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; initialize data
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jsr copydata
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jsr copydata
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; setup the stack
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lda #<(__SRAM_START__ + __SRAM_SIZE__)
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sta sp
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lda #>(__SRAM_START__ + __SRAM_SIZE__)
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sta sp+1 ; Set argument stack ptr
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sta sp
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lda #>(__SRAM_START__ + __SRAM_SIZE__)
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sta sp+1 ; Set argument stack ptr
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; Call module constructors
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jsr initlib
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jsr initlib
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; Push arguments and call main()
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jsr callmain
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jsr callmain
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; Call module destructors. This is also the _exit entry.
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_exit: jsr donelib ; Run module destructors
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_exit: jsr donelib ; Run module destructors
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; Reset the NES
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jmp start
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jmp start
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; ------------------------------------------------------------------------
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; System V-Blank Interupt
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@@ -175,8 +175,8 @@ irq:
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.word irq1 ; $fff6 ?
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.word timerirq ; $fff8 ?
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.word nmi ; $fffa vblank nmi
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.word start ; $fffc reset
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.word irq ; $fffe irq / brk
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.word start ; $fffc reset
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.word irq ; $fffe irq / brk
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; ------------------------------------------------------------------------
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; character data
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