diff --git a/doc/sim65.sgml b/doc/sim65.sgml index f8e5caf19..849d6c65c 100644 --- a/doc/sim65.sgml +++ b/doc/sim65.sgml @@ -276,13 +276,12 @@ Jan 1st, 1970 UTC, at the time of the last latch operation. The low 32 bits of
The two different wallclock-time latch registers will always refer to precisely the same time instant. For some applications, the single 64-bit value measured in nanoseconds will be more convenient, while -for other applications, the split 32/32 bits representations with separate seconds and nanosecond +for other applications, the split 32/32 bits representations with separate second and nanosecond values will be more convenient. -
Note that the definition above, with time elapsed measured since Midnight, Jan 1st, 1970 UTC is -an approximation, as the implementation depends on the way POSIX definition time, which does -not account for leap seconds (POSIX falsely assumes that all days are precisely 86400 seconds -long). +
Note that the definition above, with time elapsed measured since Midnight, Jan 1st, 1970 UTC, is +an approximation, as the implementation depends on the way POSIX definition time, and POSIX does +not account for leap seconds; it falsely assumes that all days are precisely 86400 seconds long.
On reset, PERIPHERALS_COUNTER_SELECT is initialized to zero. If the PERIPHERALS_COUNTER_SELECT register holds a value other than one of the six values described above, all PERIPHERALS_COUNTER_VALUE @@ -295,6 +294,39 @@ while address $FFC9 holds the most significant byte (MSB).
On reset, all latch registers are reset to zero. Reading any of the PERIPHERALS_COUNTER_VALUE
bytes before the first write to PERIPHERALS_COUNTER_LATCH will yield zero.
+Example:
+
+
sim65 (and all cc65 binutils) are (C) Copyright 1998-2000 Ullrich von