fix instruction set bits set by the compiler. in particular do not set the 65SC02 bit for 4510/45GS02, else we get clashes with sta(zp)
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@@ -47,7 +47,7 @@
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/* CPUs */
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typedef enum {
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CPU_UNKNOWN = -1, /* Not specified or invalid target */
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CPU_NONE, /* No CPU - for assembler */
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CPU_NONE = 0, /* No CPU - for assembler */
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CPU_6502,
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CPU_6502X, /* "Extended", that is: with illegal opcodes */
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CPU_6502DTV, /* CPU_6502 + DTV extra and illegal opcodes */
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@@ -62,7 +62,7 @@ typedef enum {
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CPU_COUNT /* Number of different CPUs */
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} cpu_t;
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/* CPU instruction sets */
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/* CPU instruction sets (make sure this matches asminc/cpu.mac) */
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enum {
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CPU_ISET_NONE = 1 << CPU_NONE,
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CPU_ISET_6502 = 1 << CPU_6502,
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