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Renamed RAM to MAIN for all disk based targets.

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The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM.

For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header.

Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
This commit is contained in:
Oliver Schmidt
2016-03-07 01:28:55 +01:00
parent 419eb700b5
commit d8c31cf1d3
52 changed files with 530 additions and 531 deletions
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8
libsrc/atari/crt0.s
View File

@@ -14,7 +14,7 @@
.import initlib, donelib
.import callmain, zerobss
.import __RESERVED_MEMORY__
.import __RAM_START__, __RAM_SIZE__
.import __MAIN_START__, __MAIN_SIZE__
.ifdef __ATARIXL__
.import __STACKSIZE__
.import sram_init
@@ -55,10 +55,10 @@ start:
.ifdef __ATARIXL__
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1
stx sp+1
.else

4
libsrc/atari/exehdr.s
View File

@@ -1,11 +1,11 @@
; This file defines the EXE header and main chunk load header for Atari executables
.export __EXEHDR__: absolute = 1
.import __RAM_START__, __BSS_LOAD__
.import __MAIN_START__, __BSS_LOAD__
.segment "EXEHDR"
.word $FFFF
.segment "MAINHDR"
.word __RAM_START__
.word __MAIN_START__
.word __BSS_LOAD__ - 1

8
libsrc/atmos/crt0.s
View File

@@ -9,7 +9,7 @@
.export __STARTUP__ : absolute = 1 ; Mark as startup
.import initlib, donelib
.import callmain, zerobss
.import __RAM_START__, __RAM_SIZE__, __STACKSIZE__
.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
.include "zeropage.inc"
.include "atmos.inc"
@@ -44,10 +44,10 @@ L1: lda sp,x
tsx
stx spsave ; Save system stk ptr
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1 ; Set argument stack ptr
stx sp+1 ; Set argument stack ptr
; Call the module constructors.

8
libsrc/c128/crt0.s
View File

@@ -8,7 +8,7 @@
.import zerobss
.import push0, callmain
.import RESTOR, BSOUT, CLRCH
.import __RAM_START__, __RAM_SIZE__, __STACKSIZE__
.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
.importzp ST
.include "zeropage.inc"
@@ -56,10 +56,10 @@ L1: lda sp,x
tsx
stx spsave ; Save the system stack pointer
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1 ; Set argument stack ptr
stx sp+1 ; Set argument stack ptr
; Call the module constructors.

6
libsrc/gamate/crt0.s
View File

@@ -33,16 +33,16 @@ Start:
; setup the stack
lda #<(__RAM_START__+__RAM_SIZE__)
ldx #>(__RAM_START__+__RAM_SIZE__)
sta sp
lda #>(__RAM_START__+__RAM_SIZE__)
sta sp + 1
stx sp + 1
; Call module constructors
jsr initlib
lda #1
sta ZP_IRQ_CTRL ; enable calling cartridge IRQ/NMI handler
cli ; allow IRQ only after constructors have run
cli ; allow IRQ only after constructors have run
; Pass an empty command line
jsr push0 ; argc

7
libsrc/lynx/bllhdr.s
View File

@@ -4,7 +4,7 @@
; This header is required for BLL builds.
;
.import __BSS_LOAD__
.import __RAM_START__
.import __MAIN_START__
.export __BLLHDR__: absolute = 1
; ------------------------------------------------------------------------
@@ -12,8 +12,7 @@
.segment "BLLHDR"
.word $0880
.dbyt __RAM_START__
.dbyt __BSS_LOAD__ - __RAM_START__ + 10
.dbyt __MAIN_START__
.dbyt __BSS_LOAD__ - __MAIN_START__ + 10
.byte $42,$53
.byte $39,$33

8
libsrc/lynx/crt0.s
View File

@@ -22,7 +22,7 @@
.import zerobss
.import callmain
.import _main
.import __RAM_START__, __RAM_SIZE__, __STACKSIZE__
.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
.include "zeropage.inc"
.include "extzp.inc"
@@ -79,10 +79,10 @@ MikeyInitData: .byte $9e,$18,$68,$1f,$00,$00,$00,$00,$00,$ff,$1a,$1b,$04,$0d,$2
; Set up the stack.
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1
stx sp+1
; Init Mickey.

4
libsrc/lynx/defdir.s
View File

@@ -5,7 +5,7 @@
;
.include "lynx.inc"
.import __STARTOFDIRECTORY__
.import __RAM_START__
.import __MAIN_START__
.import __CODE_SIZE__, __DATA_SIZE__, __RODATA_SIZE__
.import __STARTUP_SIZE__, __ONCE_SIZE__, __LOWCODE_SIZE__
.import __BLOCKSIZE__
@@ -25,6 +25,6 @@ len0 = __STARTUP_SIZE__ + __ONCE_SIZE__ + __CODE_SIZE__ + __DATA_SIZE__ + __RODA
.byte <block0
.word off0 & (__BLOCKSIZE__ - 1)
.byte $88
.word __RAM_START__
.word __MAIN_START__
.word len0
__DIRECTORY_END__:

12
libsrc/osic1p/bootstrap.s
View File

@@ -6,16 +6,16 @@
; add "-u __BOOT__" to the cl65/ld65 command line. Then, the linker
; will import this symbol name; and, link this module at the front
; of your program file.
;
.export __BOOT__:abs = 1
.import __RAM_START__, __RAM_SIZE__, __BSS_RUN__
.export __BOOT__ : abs = 1
.import __MAIN_START__, __MAIN_SIZE__, __BSS_RUN__
; ------------------------------------------------------------------------
load_addr := __RAM_START__
load_size = __BSS_RUN__ - __RAM_START__
ram_top := __RAM_START__ + __RAM_SIZE__
load_addr := __MAIN_START__
load_size = __BSS_RUN__ - __MAIN_START__
ram_top := __MAIN_START__ + __MAIN_SIZE__
.segment "BOOT"

8
libsrc/osic1p/crt0.s
View File

@@ -8,7 +8,7 @@
.import _main
.export __STARTUP__ : absolute = 1 ; Mark as startup
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.import __MAIN_START__, __MAIN_SIZE__ ; Linker generated
.import __STACKSIZE__
.import zerobss, initlib, donelib
@@ -32,10 +32,10 @@ _init: ldx #$FF ; Initialize stack pointer to $01FF
; ---------------------------------------------------------------------------
; Set cc65 argument stack pointer
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1
stx sp+1
; ---------------------------------------------------------------------------
; Initialize memory storage

10
libsrc/plus4/crt0.s
View File

@@ -9,7 +9,7 @@
.import callirq_y, initlib, donelib
.import callmain, zerobss
.import __INTERRUPTOR_COUNT__
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.import __MAIN_START__, __MAIN_SIZE__ ; Linker generated
.import __STACKSIZE__ ; Linker generated
.importzp ST
@@ -50,12 +50,12 @@ L1: lda sp,x
; of the usable RAM.
tsx
stx spsave ; save system stk ptr
stx spsave ; Save system stk ptr
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1
stx sp+1
; Set up the IRQ vector in the banked RAM; and, switch off the ROM.

6
libsrc/sim6502/crt0.s
View File

@@ -9,7 +9,7 @@
.import zerobss, callmain
.import initlib, donelib
.import exit
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.import __MAIN_START__, __MAIN_SIZE__ ; Linker generated
.import __STACKSIZE__ ; Linker generated
.include "zeropage.inc"
@@ -19,8 +19,8 @@
cld
ldx #$FF
txs
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
ldx #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
stx sp+1
jsr zerobss

8
libsrc/vic20/crt0.s
View File

@@ -8,7 +8,7 @@
.import zerobss, push0
.import callmain
.import RESTOR, BSOUT, CLRCH
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.import __MAIN_START__, __MAIN_SIZE__ ; Linker generated
.import __STACKSIZE__ ; Linker generated
.importzp ST
@@ -44,10 +44,10 @@ L1: lda sp,x
tsx
stx spsave ; Save the system stack ptr
lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
sta sp
lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
sta sp+1 ; Set argument stack ptr
stx sp+1 ; Set argument stack ptr
; Call the module constructors.