diff --git a/cocotbext/axi/axi_master.py b/cocotbext/axi/axi_master.py
index 5fa1d6a..6f5015b 100644
--- a/cocotbext/axi/axi_master.py
+++ b/cocotbext/axi/axi_master.py
@@ -476,7 +476,7 @@ class AxiMasterWrite(Region, Reset):
 
             cycles = (len(cmd.data) + (cmd.address % num_bytes) + num_bytes-1) // num_bytes
 
-            cur_addr = aligned_addr
+            cur_addr = cmd.address
             offset = 0
             cycle_offset = aligned_addr-word_addr
             n = 0
@@ -563,7 +563,10 @@ class AxiMasterWrite(Region, Reset):
 
                 await self.w_channel.send(w)
 
-                cur_addr += num_bytes
+                if k == 0:
+                    cur_addr = aligned_addr + num_bytes
+                else:
+                    cur_addr += num_bytes
                 cycle_offset = (cycle_offset + num_bytes) % self.byte_lanes
 
             resp_cmd = AxiWriteRespCmd(cmd.address, len(cmd.data), cmd.size, cycles, cmd.prot, burst_list, cmd.event)
@@ -870,7 +873,7 @@ class AxiMasterRead(Region, Reset):
 
             burst_list = []
 
-            cur_addr = aligned_addr
+            cur_addr = cmd.address
             n = 0
 
             burst_length = 0
@@ -915,7 +918,10 @@ class AxiMasterRead(Region, Reset):
                     self.log.info("Read burst start arid: 0x%x araddr: 0x%08x arlen: %d arsize: %d arprot: %s",
                             arid, cur_addr, burst_length-1, cmd.size, cmd.prot)
 
-                cur_addr += num_bytes
+                if k == 0:
+                    cur_addr = aligned_addr + num_bytes
+                else:
+                    cur_addr += num_bytes
 
             resp_cmd = AxiReadRespCmd(cmd.address, cmd.length, cmd.size, cycles, cmd.prot, burst_list, cmd.event)
             self.tag_context_manager.start_cmd(arid, resp_cmd)
diff --git a/cocotbext/axi/axil_master.py b/cocotbext/axi/axil_master.py
index 2c02b88..d1f48fd 100644
--- a/cocotbext/axi/axil_master.py
+++ b/cocotbext/axi/axil_master.py
@@ -286,7 +286,10 @@ class AxiLiteMasterWrite(Region, Reset):
                     offset += 1
 
                 aw = self.aw_channel._transaction_obj()
-                aw.awaddr = word_addr + k*self.byte_lanes
+                if k == 0:
+                    aw.awaddr = cmd.address
+                else:
+                    aw.awaddr = word_addr + k*self.byte_lanes
                 aw.awprot = cmd.prot
 
                 if not self.wstrb_present and strb != self.strb_mask:
@@ -494,7 +497,10 @@ class AxiLiteMasterRead(Region, Reset):
 
             for k in range(cycles):
                 ar = self.ar_channel._transaction_obj()
-                ar.araddr = word_addr + k*self.byte_lanes
+                if k == 0:
+                    ar.araddr = cmd.address
+                else:
+                    ar.araddr = word_addr + k*self.byte_lanes
                 ar.arprot = cmd.prot
 
                 await self.ar_channel.send(ar)