Remove extraneous code
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@@ -63,7 +63,6 @@ class AxiLiteSlaveWrite(Reset):
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self.wstrb_present = hasattr(self.bus.w, "wstrb")
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self.wstrb_present = hasattr(self.bus.w, "wstrb")
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self.log.info("AXI lite slave model configuration:")
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self.log.info("AXI lite slave model configuration:")
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self.log.info(" Memory size: %d bytes", len(self.mem))
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self.log.info(" Address width: %d bits", self.address_width)
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self.log.info(" Address width: %d bits", self.address_width)
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self.log.info(" Byte size: %d bits", self.byte_size)
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self.log.info(" Byte size: %d bits", self.byte_size)
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self.log.info(" Data width: %d bits (%d bytes)", self.width, self.byte_lanes)
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self.log.info(" Data width: %d bits (%d bytes)", self.width, self.byte_lanes)
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@@ -182,7 +181,6 @@ class AxiLiteSlaveRead(Reset):
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self.byte_lanes = self.width // self.byte_size
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self.byte_lanes = self.width // self.byte_size
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self.log.info("AXI lite slave model configuration:")
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self.log.info("AXI lite slave model configuration:")
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self.log.info(" Memory size: %d bytes", len(self.mem))
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self.log.info(" Address width: %d bits", self.address_width)
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self.log.info(" Address width: %d bits", self.address_width)
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self.log.info(" Byte size: %d bits", self.byte_size)
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self.log.info(" Byte size: %d bits", self.byte_size)
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self.log.info(" Data width: %d bits (%d bytes)", self.width, self.byte_lanes)
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self.log.info(" Data width: %d bits (%d bytes)", self.width, self.byte_lanes)
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