Initial commit
This commit is contained in:
Alex Forencich
808
cocotbext/axi/axi_master.py
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808
cocotbext/axi/axi_master.py
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"""
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Copyright (c) 2020 Alex Forencich
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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"""
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import cocotb
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from cocotb.triggers import RisingEdge, ReadOnly, Event
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from cocotb.drivers import BusDriver
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from collections import deque
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from .constants import *
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class AxiMasterWrite(BusDriver):
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_signals = [
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# Write address channel
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"awid", "awaddr", "awlen", "awsize", "awburst", "awprot", "awvalid", "awready",
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# Write data channel
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"wdata", "wstrb", "wlast", "wvalid", "wready",
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# Write response channel
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"bid", "bresp", "bvalid", "bready",
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]
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_optional_signals = [
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# Write address channel
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"awlock", "awcache", "awqos", "awregion", "awuser",
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# Write data channel
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"wuser",
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# Write response channel
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"buser",
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]
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def __init__(self, entity, name, clock, reset=None):
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super().__init__(entity, name, clock)
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self.active_tokens = set()
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self.write_command_queue = deque()
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self.write_command_sync = Event()
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self.write_resp_queue = deque()
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self.write_resp_sync = Event()
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self.write_resp_set = set()
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self.id_queue = deque(range(2**len(self.bus.awid)))
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self.id_sync = Event()
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self.int_write_addr_queue = deque()
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self.int_write_data_queue = deque()
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self.int_write_resp_command_queue = deque()
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self.int_write_resp_command_sync = Event()
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self.int_write_resp_queue_list = {}
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self.int_write_resp_sync_list = {}
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self.in_flight_operations = 0
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self.width = len(self.bus.wdata)
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self.byte_size = 8
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self.byte_width = self.width // self.byte_size
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self.strb_mask = 2**len(self.bus.wstrb)-1
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self.max_burst_len = 256
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self.max_burst_size = (self.byte_width-1).bit_length()
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assert self.byte_width == len(self.bus.wstrb)
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assert self.byte_width * self.byte_size == self.width
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self.reset = reset
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self.bus.awid.setimmediatevalue(0)
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self.bus.awaddr.setimmediatevalue(0)
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assert len(self.bus.awlen) == 8
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self.bus.awlen.setimmediatevalue(0)
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assert len(self.bus.awsize) == 3
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self.bus.awsize.setimmediatevalue(0)
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assert len(self.bus.awburst) == 2
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self.bus.awburst.setimmediatevalue(0)
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if hasattr(self.bus, "awlock"):
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assert len(self.bus.awlock) == 1
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self.bus.awlock.setimmediatevalue(0)
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if hasattr(self.bus, "awcache"):
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assert len(self.bus.awcache) == 4
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self.bus.awcache.setimmediatevalue(0)
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assert len(self.bus.awprot) == 3
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self.bus.awprot.setimmediatevalue(0)
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if hasattr(self.bus, "awqos"):
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assert len(self.bus.awqos) == 4
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self.bus.awqos.setimmediatevalue(0)
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if hasattr(self.bus, "awregion"):
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assert len(self.bus.awregion) == 4
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self.bus.awregion.setimmediatevalue(0)
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if hasattr(self.bus, "awuser"):
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self.bus.awuser.setimmediatevalue(0)
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assert len(self.bus.awvalid) == 1
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self.bus.awvalid.setimmediatevalue(0)
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assert len(self.bus.awready) == 1
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self.bus.wdata.setimmediatevalue(0)
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self.bus.wstrb.setimmediatevalue(0)
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assert len(self.bus.wlast) == 1
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self.bus.wlast.setimmediatevalue(0)
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if hasattr(self.bus, "wuser"):
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self.bus.wuser.setimmediatevalue(0)
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assert len(self.bus.wvalid) == 1
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self.bus.wvalid.setimmediatevalue(0)
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assert len(self.bus.wready) == 1
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assert len(self.bus.bid) == len(self.bus.awid)
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assert len(self.bus.bresp) == 2
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assert len(self.bus.bvalid) == 1
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assert len(self.bus.bready) == 1
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self.bus.bready.setimmediatevalue(0)
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cocotb.fork(self._process_write())
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cocotb.fork(self._process_write_resp())
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cocotb.fork(self._process_write_addr_if())
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cocotb.fork(self._process_write_data_if())
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cocotb.fork(self._process_write_resp_if())
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def init_write(self, address, data, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0, token=None):
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if token is not None:
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if token in self.active_tokens:
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raise Exception("Token is not unique")
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self.active_tokens.add(token)
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self.in_flight_operations += 1
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self.write_command_queue.append((address, data, burst, size, lock, cache, prot, qos, region, user, token))
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self.write_command_sync.set()
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def idle(self):
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return not self.in_flight_operations
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async def wait(self):
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while not self.idle():
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self.write_resp_sync.clear()
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await self.write_resp_sync.wait()
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async def wait_for_token(self, token):
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if token not in self.active_tokens:
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return
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while token not in self.write_resp_set:
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self.write_resp_sync.clear()
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await self.write_resp_sync.wait()
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def write_resp_ready(self, token=None):
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if token is not None:
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return token in self.write_resp_set
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return bool(self.write_resp_queue)
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def get_write_resp(self, token=None):
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if token is not None:
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if token in self.write_resp_set:
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for resp in self.write_resp_queue:
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if resp[-1] == token:
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self.write_resp_queue.remove(resp)
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self.active_tokens.remove(resp[-1])
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self.write_resp_set.remove(resp[-1])
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return resp
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return None
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if self.write_resp_queue:
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resp = self.write_resp_queue.popleft()
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if resp[-1] is not None:
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self.active_tokens.remove(resp[-1])
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self.write_resp_set.remove(resp[-1])
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return resp
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return None
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async def write(self, address, data, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0):
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token = object()
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self.init_write(address, data, burst, size, lock, cache, prot, qos, region, user, token)
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await self.wait_for_token(token)
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return self.get_write_resp(token)
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async def _process_write(self):
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while True:
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if not self.write_command_queue:
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self.write_command_sync.clear()
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await self.write_command_sync.wait()
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address, data, burst, size, lock, cache, prot, qos, region, user, token = self.write_command_queue.popleft()
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num_bytes = self.byte_width
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if size is None:
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size = self.max_burst_size
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else:
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num_bytes = 2**size
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assert 0 < num_bytes <= self.byte_width
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aligned_addr = (address // num_bytes) * num_bytes
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word_addr = (address // self.byte_width) * self.byte_width
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start_offset = address % self.byte_width
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end_offset = ((address + len(data) - 1) % self.byte_width) + 1
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cycles = (len(data) + (address % num_bytes) + num_bytes-1) // num_bytes
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cur_addr = aligned_addr
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offset = 0
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cycle_offset = aligned_addr-word_addr
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n = 0
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transfer_count = 0
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burst_list = []
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burst_length = 0
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self.log.info(f"Write start addr: {address:#010x} prot: {prot} data: {' '.join((f'{c:02x}' for c in data))}")
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for k in range(cycles):
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start = cycle_offset
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stop = cycle_offset+num_bytes
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if k == 0:
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start = start_offset
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if k == cycles-1:
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stop = end_offset
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strb = (self.strb_mask << start) & self.strb_mask & (self.strb_mask >> (self.byte_width - stop))
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val = 0
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for j in range(start, stop):
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val |= bytearray(data)[offset] << j*8
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offset += 1
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if n >= burst_length:
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if not self.id_queue:
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self.id_sync.clear()
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await self.id_sync.wait()
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awid = self.id_queue.popleft()
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transfer_count += 1
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n = 0
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burst_length = min(cycles-k, min(max(self.max_burst_len, 1), 256)) # max len
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burst_length = (min(burst_length*num_bytes, 0x1000-(cur_addr&0xfff))+num_bytes-1)//num_bytes # 4k align
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burst_list.append((awid, burst_length))
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self.int_write_addr_queue.append((cur_addr, awid, burst_length-1, size, burst, lock, cache, prot, qos, region, user))
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self.log.info(f"Write burst start awid {awid:#x} awaddr: {cur_addr:#010x} awlen: {burst_length-1} awsize: {size}")
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n += 1
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self.int_write_data_queue.append((val, strb, n >= burst_length, 0))
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cur_addr += num_bytes
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cycle_offset = (cycle_offset + num_bytes) % self.byte_width
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self.int_write_resp_command_queue.append((address, len(data), size, cycles, prot, burst_list, token))
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self.int_write_resp_command_sync.set()
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async def _process_write_resp(self):
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while True:
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if not self.int_write_resp_command_queue:
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self.int_write_resp_command_sync.clear()
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await self.int_write_resp_command_sync.wait()
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addr, length, size, cycles, prot, burst_list, token = self.int_write_resp_command_queue.popleft()
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resp = AxiResp.OKAY
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user = []
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for bid, burst_length in burst_list:
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self.int_write_resp_queue_list.setdefault(bid, deque())
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self.int_write_resp_sync_list.setdefault(bid, Event())
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if not self.int_write_resp_queue_list[bid]:
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self.int_write_resp_sync_list[bid].clear()
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await self.int_write_resp_sync_list[bid].wait()
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burst_id, burst_resp, burst_user = self.int_write_resp_queue_list[bid].popleft()
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burst_resp = AxiResp(burst_resp)
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if burst_resp != AxiResp.OKAY:
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resp = burst_resp
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if burst_user is not None:
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user.append(burst_user)
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if bid in self.id_queue:
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raise Exception(f"Unexpected burst ID {bid}")
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self.id_queue.append(bid)
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self.id_sync.set()
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self.log.info(f"Write burst complete bid {burst_id:#x} bresp: {burst_resp!s}")
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self.log.info(f"Write complete addr: {addr:#010x} prot: {prot} resp: {resp!s} length: {length}")
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self.write_resp_queue.append((addr, length, resp, user, token))
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self.write_resp_sync.set()
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if token is not None:
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self.write_resp_set.add(token)
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self.in_flight_operations -= 1
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async def _process_write_addr_if(self):
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while True:
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await ReadOnly()
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# read handshake signals
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awready_sample = self.bus.awready.value
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awvalid_sample = self.bus.awvalid.value
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if self.reset is not None and self.reset.value:
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await RisingEdge(self.clock)
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self.bus.awvalid <= 0
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continue
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await RisingEdge(self.clock)
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if (awready_sample and awvalid_sample) or (not awvalid_sample):
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if self.int_write_addr_queue:
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addr, awid, length, size, burst, lock, cache, prot, qos, region, user = self.int_write_addr_queue.popleft()
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self.bus.awaddr <= addr
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self.bus.awid <= awid
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self.bus.awlen <= length
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self.bus.awsize <= size
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self.bus.awburst <= burst
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if hasattr(self.bus, "awlock"):
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self.bus.awlock <= lock
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if hasattr(self.bus, "awcache"):
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self.bus.awcache <= cache
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self.bus.awprot <= prot
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if hasattr(self.bus, "awqos"):
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self.bus.awqos <= qos
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if hasattr(self.bus, "awregion"):
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self.bus.awregion <= region
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if hasattr(self.bus, "awuser"):
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self.bus.awuser <= user
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self.bus.awvalid <= 1
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else:
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self.bus.awvalid <= 0
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async def _process_write_data_if(self):
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while True:
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await ReadOnly()
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# read handshake signals
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wready_sample = self.bus.wready.value
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wvalid_sample = self.bus.wvalid.value
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if self.reset is not None and self.reset.value:
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await RisingEdge(self.clock)
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self.bus.wvalid <= 0
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continue
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await RisingEdge(self.clock)
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if (wready_sample and wvalid_sample) or (not wvalid_sample):
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if self.int_write_data_queue:
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data, strb, last, user = self.int_write_data_queue.popleft()
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self.bus.wdata <= data
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self.bus.wstrb <= strb
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self.bus.wlast <= last
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if hasattr(self.bus, "awuser"):
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self.bus.awuser <= user
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self.bus.wvalid <= 1
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else:
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self.bus.wvalid <= 0
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async def _process_write_resp_if(self):
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while True:
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await ReadOnly()
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# read handshake signals
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bready_sample = self.bus.bready.value
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bvalid_sample = self.bus.bvalid.value
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if self.reset is not None and self.reset.value:
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await RisingEdge(self.clock)
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self.bus.bready <= 0
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continue
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if bready_sample and bvalid_sample:
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bid = self.bus.bid.value.integer
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bresp = self.bus.bresp.value.integer
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buser = self.bus.buser.value.integer if hasattr(self.bus, "buser") else None
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self.int_write_resp_queue_list.setdefault(bid, deque())
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self.int_write_resp_queue_list[bid].append((bid, bresp, buser))
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self.int_write_resp_sync_list.setdefault(bid, Event())
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self.int_write_resp_sync_list[bid].set()
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await RisingEdge(self.clock)
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self.bus.bready <= 1
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class AxiMasterRead(BusDriver):
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_signals = [
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# Read address channel
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"arid", "araddr", "arlen", "arsize", "arburst", "arprot", "arvalid", "arready",
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# Read data channel
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"rid", "rdata", "rresp", "rlast", "rvalid", "rready",
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]
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_optional_signals = [
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# Read address channel
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"arlock", "arcache", "arqos", "arregion", "aruser",
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# Read data channel
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"ruser",
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]
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def __init__(self, entity, name, clock, reset=None):
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super().__init__(entity, name, clock)
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self.active_tokens = set()
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self.read_command_queue = deque()
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self.read_command_sync = Event()
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self.read_data_queue = deque()
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self.read_data_sync = Event()
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self.read_data_set = set()
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self.id_queue = deque(range(2**len(self.bus.arid)))
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self.id_sync = Event()
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self.int_read_addr_queue = deque()
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self.int_read_resp_command_queue = deque()
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self.int_read_resp_command_sync = Event()
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self.int_read_resp_queue_list = {}
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self.int_read_resp_sync_list = {}
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self.in_flight_operations = 0
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self.width = len(self.bus.rdata)
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self.byte_size = 8
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self.byte_width = self.width // self.byte_size
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self.max_burst_len = 256
|
||||
self.max_burst_size = (self.byte_width-1).bit_length()
|
||||
|
||||
assert self.byte_width * self.byte_size == self.width
|
||||
|
||||
self.reset = reset
|
||||
|
||||
self.bus.arid.setimmediatevalue(0)
|
||||
self.bus.araddr.setimmediatevalue(0)
|
||||
assert len(self.bus.arlen) == 8
|
||||
self.bus.arlen.setimmediatevalue(0)
|
||||
assert len(self.bus.arsize) == 3
|
||||
self.bus.arsize.setimmediatevalue(0)
|
||||
assert len(self.bus.arburst) == 2
|
||||
self.bus.arburst.setimmediatevalue(0)
|
||||
if hasattr(self.bus, "arlock"):
|
||||
assert len(self.bus.arlock) == 1
|
||||
self.bus.arlock.setimmediatevalue(0)
|
||||
if hasattr(self.bus, "arcache"):
|
||||
assert len(self.bus.arcache) == 4
|
||||
self.bus.arcache.setimmediatevalue(0)
|
||||
assert len(self.bus.arprot) == 3
|
||||
self.bus.arprot.setimmediatevalue(0)
|
||||
if hasattr(self.bus, "arqos"):
|
||||
assert len(self.bus.arqos) == 4
|
||||
self.bus.arqos.setimmediatevalue(0)
|
||||
if hasattr(self.bus, "arregion"):
|
||||
assert len(self.bus.arregion) == 4
|
||||
self.bus.arregion.setimmediatevalue(0)
|
||||
if hasattr(self.bus, "aruser"):
|
||||
self.bus.aruser.setimmediatevalue(0)
|
||||
assert len(self.bus.arvalid) == 1
|
||||
self.bus.arvalid.setimmediatevalue(0)
|
||||
assert len(self.bus.arready) == 1
|
||||
|
||||
assert len(self.bus.rid) == len(self.bus.arid)
|
||||
assert len(self.bus.rresp) == 2
|
||||
assert len(self.bus.rlast) == 1
|
||||
assert len(self.bus.rvalid) == 1
|
||||
assert len(self.bus.rready) == 1
|
||||
self.bus.rready.setimmediatevalue(0)
|
||||
|
||||
cocotb.fork(self._process_read())
|
||||
cocotb.fork(self._process_read_resp())
|
||||
cocotb.fork(self._process_read_addr_if())
|
||||
cocotb.fork(self._process_read_resp_if())
|
||||
|
||||
def init_read(self, address, length, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0, token=None):
|
||||
if token is not None:
|
||||
if token in self.active_tokens:
|
||||
raise Exception("Token is not unique")
|
||||
self.active_tokens.add(token)
|
||||
|
||||
self.in_flight_operations += 1
|
||||
|
||||
self.read_command_queue.append((address, length, burst, size, lock, cache, prot, qos, region, user, token))
|
||||
self.read_command_sync.set()
|
||||
|
||||
def idle(self):
|
||||
return not self.in_flight_operations
|
||||
|
||||
async def wait(self):
|
||||
while not self.idle():
|
||||
self.read_resp_sync.clear()
|
||||
await self.read_resp_sync.wait()
|
||||
|
||||
async def wait_for_token(self, token):
|
||||
if token not in self.active_tokens:
|
||||
return
|
||||
while token not in self.read_data_set:
|
||||
self.read_data_sync.clear()
|
||||
await self.read_data_sync.wait()
|
||||
|
||||
def read_data_ready(self, token=None):
|
||||
if token is not None:
|
||||
return token in self.read_data_set
|
||||
return bool(self.read_data_queue)
|
||||
|
||||
def get_read_data(self, token=None):
|
||||
if token is not None:
|
||||
if token in self.read_data_set:
|
||||
for resp in self.read_data_queue:
|
||||
if resp[-1] == token:
|
||||
self.read_data_queue.remove(resp)
|
||||
self.active_tokens.remove(resp[-1])
|
||||
self.read_data_set.remove(resp[-1])
|
||||
return resp
|
||||
return None
|
||||
if self.read_data_queue:
|
||||
resp = self.read_data_queue.popleft()
|
||||
if resp[-1] is not None:
|
||||
self.active_tokens.remove(resp[-1])
|
||||
self.read_data_set.remove(resp[-1])
|
||||
return resp
|
||||
return None
|
||||
|
||||
async def read(self, address, length, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0):
|
||||
token = object()
|
||||
self.init_read(address, length, burst, size, lock, cache, prot, qos, region, user, token)
|
||||
await self.wait_for_token(token)
|
||||
return self.get_read_data(token)
|
||||
|
||||
async def _process_read(self):
|
||||
while True:
|
||||
if not self.read_command_queue:
|
||||
self.read_command_sync.clear()
|
||||
await self.read_command_sync.wait()
|
||||
|
||||
address, length, burst, size, lock, cache, prot, qos, region, user, token = self.read_command_queue.popleft()
|
||||
|
||||
num_bytes = self.byte_width
|
||||
|
||||
if size is None:
|
||||
size = self.max_burst_size
|
||||
else:
|
||||
num_bytes = 2**size
|
||||
assert 0 < num_bytes <= self.byte_width
|
||||
|
||||
aligned_addr = (address // num_bytes) * num_bytes
|
||||
word_addr = (address // self.byte_width) * self.byte_width
|
||||
|
||||
cycles = (length + num_bytes-1 + (address % num_bytes)) // num_bytes
|
||||
|
||||
burst_list = []
|
||||
|
||||
cur_addr = aligned_addr
|
||||
n = 0
|
||||
|
||||
burst_length = 0
|
||||
|
||||
for k in range(cycles):
|
||||
|
||||
n += 1
|
||||
if n >= burst_length:
|
||||
if not self.id_queue:
|
||||
self.id_sync.clear()
|
||||
await self.id_sync.wait()
|
||||
|
||||
arid = self.id_queue.popleft()
|
||||
|
||||
n = 0
|
||||
|
||||
burst_length = min(cycles-k, min(max(self.max_burst_len, 1), 256)) # max len
|
||||
burst_length = (min(burst_length*num_bytes, 0x1000-(cur_addr&0xfff))+num_bytes-1)//num_bytes # 4k align
|
||||
|
||||
burst_list.append((arid, burst_length))
|
||||
self.int_read_addr_queue.append((cur_addr, arid, burst_length-1, size, burst, lock, cache, prot, qos, region, user))
|
||||
|
||||
self.log.info(f"Read burst start arid {arid:#x} araddr: {cur_addr:#010x} arlen: {burst_length-1} arsize: {size}")
|
||||
|
||||
cur_addr += num_bytes
|
||||
|
||||
self.int_read_resp_command_queue.append((address, length, size, cycles, prot, burst_list, token))
|
||||
self.int_read_resp_command_sync.set()
|
||||
|
||||
|
||||
async def _process_read_resp(self):
|
||||
while True:
|
||||
if not self.int_read_resp_command_queue:
|
||||
self.int_read_resp_command_sync.clear()
|
||||
await self.int_read_resp_command_sync.wait()
|
||||
|
||||
addr, length, size, cycles, prot, burst_list, token = self.int_read_resp_command_queue.popleft()
|
||||
|
||||
num_bytes = 2**size
|
||||
|
||||
aligned_addr = (addr // num_bytes) * num_bytes
|
||||
word_addr = (addr // self.byte_width) * self.byte_width
|
||||
|
||||
start_offset = addr % self.byte_width
|
||||
end_offset = ((addr + length - 1) % self.byte_width) + 1
|
||||
|
||||
cycle_offset = aligned_addr - word_addr
|
||||
data = bytearray()
|
||||
|
||||
resp = AxiResp.OKAY
|
||||
user = []
|
||||
|
||||
first = True
|
||||
|
||||
for rid, burst_length in burst_list:
|
||||
for k in range(burst_length):
|
||||
self.int_read_resp_queue_list.setdefault(rid, deque())
|
||||
self.int_read_resp_sync_list.setdefault(rid, Event())
|
||||
if not self.int_read_resp_queue_list[rid]:
|
||||
self.int_read_resp_sync_list[rid].clear()
|
||||
await self.int_read_resp_sync_list[rid].wait()
|
||||
|
||||
cycle_id, cycle_data, cycle_resp, cycle_last, cycle_user = self.int_read_resp_queue_list[rid].popleft()
|
||||
cycle_resp = AxiResp(cycle_resp)
|
||||
|
||||
if cycle_resp != AxiResp.OKAY:
|
||||
resp = cycle_resp
|
||||
|
||||
if cycle_user is not None:
|
||||
user.append(cycle_user)
|
||||
|
||||
start = cycle_offset
|
||||
stop = cycle_offset+num_bytes
|
||||
|
||||
if first:
|
||||
start = start_offset
|
||||
|
||||
assert cycle_last == (k == burst_length - 1)
|
||||
|
||||
for j in range(start, stop):
|
||||
data.append((cycle_data >> j*8) & 0xff)
|
||||
|
||||
cycle_offset = (cycle_offset + num_bytes) % self.byte_width
|
||||
|
||||
first = False
|
||||
|
||||
if rid in self.id_queue:
|
||||
raise Exception(f"Unexpected burst ID {rid}")
|
||||
self.id_queue.append(rid)
|
||||
self.id_sync.set()
|
||||
|
||||
self.log.info(f"Read burst complete rid {cycle_id:#x} rresp: {resp!s}")
|
||||
|
||||
data = data[:length]
|
||||
|
||||
self.log.info(f"Read complete addr: {addr:#010x} prot: {prot} resp: {resp!s} data: {' '.join((f'{c:02x}' for c in data))}")
|
||||
|
||||
self.read_data_queue.append((addr, data, resp, user, token))
|
||||
self.read_data_sync.set()
|
||||
if token is not None:
|
||||
self.read_data_set.add(token)
|
||||
self.in_flight_operations -= 1
|
||||
|
||||
async def _process_read_addr_if(self):
|
||||
while True:
|
||||
await ReadOnly()
|
||||
|
||||
# read handshake signals
|
||||
arready_sample = self.bus.arready.value
|
||||
arvalid_sample = self.bus.arvalid.value
|
||||
|
||||
if self.reset is not None and self.reset.value:
|
||||
await RisingEdge(self.clock)
|
||||
self.bus.arvalid <= 0
|
||||
continue
|
||||
|
||||
await RisingEdge(self.clock)
|
||||
|
||||
if (arready_sample and arvalid_sample) or (not arvalid_sample):
|
||||
if self.int_read_addr_queue:
|
||||
addr, arid, length, size, burst, lock, cache, prot, qos, region, user = self.int_read_addr_queue.popleft()
|
||||
self.bus.araddr <= addr
|
||||
self.bus.arid <= arid
|
||||
self.bus.arlen <= length
|
||||
self.bus.arsize <= size
|
||||
self.bus.arburst <= burst
|
||||
if hasattr(self.bus, "arlock"):
|
||||
self.bus.arlock <= lock
|
||||
if hasattr(self.bus, "arcache"):
|
||||
self.bus.arcache <= cache
|
||||
self.bus.arprot <= prot
|
||||
if hasattr(self.bus, "arqos"):
|
||||
self.bus.arqos <= qos
|
||||
if hasattr(self.bus, "arregion"):
|
||||
self.bus.arregion <= region
|
||||
if hasattr(self.bus, "aruser"):
|
||||
self.bus.aruser <= user
|
||||
self.bus.arvalid <= 1
|
||||
else:
|
||||
self.bus.arvalid <= 0
|
||||
|
||||
async def _process_read_resp_if(self):
|
||||
while True:
|
||||
await ReadOnly()
|
||||
|
||||
# read handshake signals
|
||||
rready_sample = self.bus.rready.value
|
||||
rvalid_sample = self.bus.rvalid.value
|
||||
|
||||
if self.reset is not None and self.reset.value:
|
||||
await RisingEdge(self.clock)
|
||||
self.bus.rready <= 0
|
||||
continue
|
||||
|
||||
if rready_sample and rvalid_sample:
|
||||
rid = self.bus.rid.value.integer
|
||||
rdata = self.bus.rdata.value.integer
|
||||
rresp = self.bus.rresp.value.integer
|
||||
rlast = self.bus.rlast.value.integer
|
||||
ruser = self.bus.ruser.value.integer if hasattr(self.bus, "ruser") else None
|
||||
self.int_read_resp_queue_list.setdefault(rid, deque())
|
||||
self.int_read_resp_queue_list[rid].append((rid, rdata, rresp, rlast, ruser))
|
||||
self.int_read_resp_sync_list.setdefault(rid, Event())
|
||||
self.int_read_resp_sync_list[rid].set()
|
||||
|
||||
await RisingEdge(self.clock)
|
||||
self.bus.rready <= 1
|
||||
|
||||
|
||||
class AxiMaster(object):
|
||||
def __init__(self, entity, name, clock, reset=None):
|
||||
self.write_if = None
|
||||
self.read_if = None
|
||||
self.clock = clock
|
||||
|
||||
self.write_if = AxiMasterWrite(entity, name, clock, reset)
|
||||
self.read_if = AxiMasterRead(entity, name, clock, reset)
|
||||
|
||||
def init_read(self, address, length, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0, token=None):
|
||||
if not self.read_if:
|
||||
raise Exception()
|
||||
self.read_if.init_read(address, length, burst, size, lock, cache, prot, qos, region, user, token)
|
||||
|
||||
def init_write(self, address, data, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0, token=None):
|
||||
if not self.write_if:
|
||||
raise Exception()
|
||||
self.write_if.init_write(address, data, burst, size, lock, cache, prot, qos, region, user, token)
|
||||
|
||||
def idle(self):
|
||||
return (not self.read_if or self.read_if.idle()) and (not self.write_if or self.write_if.idle())
|
||||
|
||||
async def wait(self):
|
||||
while not self.idle():
|
||||
await RisingEdge(self.clock)
|
||||
|
||||
async def wait_read(self):
|
||||
if not self.read_if:
|
||||
raise Exception()
|
||||
await self.read_if.wait()
|
||||
|
||||
async def wait_write(self):
|
||||
if not self.write_if:
|
||||
raise Exception()
|
||||
await self.write_if.wait()
|
||||
|
||||
def read_data_ready(self, token=None):
|
||||
if not self.read_if:
|
||||
raise Exception()
|
||||
return self.read_if.read_data_ready(token)
|
||||
|
||||
def get_read_data(self, token=None):
|
||||
if not self.read_if:
|
||||
raise Exception()
|
||||
return self.read_if.get_read_data(token)
|
||||
|
||||
def write_resp_ready(self, token=None):
|
||||
if not self.write_if:
|
||||
raise Exception()
|
||||
return self.write_if.write_resp_ready(token)
|
||||
|
||||
def get_write_resp(self, token=None):
|
||||
if not self.write_if:
|
||||
raise Exception()
|
||||
return self.write_if.get_write_resp(token)
|
||||
|
||||
async def read(self, address, length, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0):
|
||||
if not self.read_if:
|
||||
raise Exception()
|
||||
return await self.read_if.read(address, length, burst, size, lock, cache, prot, qos, region, user)
|
||||
|
||||
async def write(self, address, data, burst=AxiBurstType.INCR, size=None, lock=AxiLockType.NORMAL, cache=0b0011, prot=AxiProt.NONSECURE, qos=0, region=0, user=0):
|
||||
if not self.write_if:
|
||||
raise Exception()
|
||||
return await self.write_if.write(address, data, burst, size, lock, cache, prot, qos, region, user)
|
||||
|
||||
Reference in New Issue
Block a user