bslathi19/cocotbext-axi
1
0
Fork 0
Code Issues Actions Packages Projects Releases 5 Wiki Activity

Peel off memory interface methods into separate object, add word access wrappers

Browse Source
This commit is contained in:
Alex Forencich
2020-12-01 22:48:41 -08:00
parent 0bbad73760
commit 645ebb069c
5 changed files with 135 additions and 143 deletions
Download Patch File Download Diff File Expand all files Collapse all files

76
cocotbext/axi/axi_ram.py
View File

@@ -22,19 +22,17 @@ THE SOFTWARE.
"""
import mmap
import cocotb
from cocotb.log import SimLog
from .version import __version__
from .constants import AxiBurstType, AxiProt, AxiResp
from .axi_channels import AxiAWSink, AxiWSink, AxiBSource, AxiARSink, AxiRSource
from .utils import hexdump, hexdump_str
from .memory import Memory
class AxiRamWrite(object):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None):
class AxiRamWrite(Memory):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None, *args, **kwargs):
self.log = SimLog("cocotb.%s.%s" % (entity._name, name))
self.log.info("AXI RAM model (write)")
@@ -42,11 +40,7 @@ class AxiRamWrite(object):
self.log.info("Copyright (c) 2020 Alex Forencich")
self.log.info("https://github.com/alexforencich/cocotbext-axi")
if type(mem) is mmap.mmap:
self.mem = mem
else:
self.mem = mmap.mmap(-1, size)
self.size = len(self.mem)
super().__init__(size, mem, *args, **kwargs)
self.reset = reset
@@ -75,20 +69,6 @@ class AxiRamWrite(object):
cocotb.fork(self._process_write())
def read_mem(self, address, length):
self.mem.seek(address)
return self.mem.read(length)
def write_mem(self, address, data):
self.mem.seek(address)
self.mem.write(bytes(data))
def hexdump(self, address, length, prefix=""):
hexdump(self.mem, address, length, prefix=prefix)
def hexdump_str(self, address, length, prefix=""):
return hexdump_str(self.mem, address, length, prefix=prefix)
async def _process_write(self):
while True:
await self.aw_channel.wait()
@@ -163,8 +143,8 @@ class AxiRamWrite(object):
self.b_channel.send(b)
class AxiRamRead(object):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None):
class AxiRamRead(Memory):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None, *args, **kwargs):
self.log = SimLog("cocotb.%s.%s" % (entity._name, name))
self.log.info("AXI RAM model (read)")
@@ -172,11 +152,7 @@ class AxiRamRead(object):
self.log.info("Copyright (c) 2020 Alex Forencich")
self.log.info("https://github.com/alexforencich/cocotbext-axi")
if type(mem) is mmap.mmap:
self.mem = mem
else:
self.mem = mmap.mmap(-1, size)
self.size = len(self.mem)
super().__init__(size, mem, *args, **kwargs)
self.reset = reset
@@ -202,20 +178,6 @@ class AxiRamRead(object):
cocotb.fork(self._process_read())
def read_mem(self, address, length):
self.mem.seek(address)
return self.mem.read(length)
def write_mem(self, address, data):
self.mem.seek(address)
self.mem.write(bytes(data))
def hexdump(self, address, length, prefix=""):
hexdump(self.mem, address, length, prefix=prefix)
def hexdump_str(self, address, length, prefix=""):
return hexdump_str(self.mem, address, length, prefix=prefix)
async def _process_read(self):
while True:
await self.ar_channel.wait()
@@ -275,30 +237,12 @@ class AxiRamRead(object):
cur_addr = lower_wrap_boundary
class AxiRam(object):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None):
class AxiRam(Memory):
def __init__(self, entity, name, clock, reset=None, size=1024, mem=None, *args, **kwargs):
self.write_if = None
self.read_if = None
if type(mem) is mmap.mmap:
self.mem = mem
else:
self.mem = mmap.mmap(-1, size)
self.size = len(self.mem)
super().__init__(size, mem, *args, **kwargs)
self.write_if = AxiRamWrite(entity, name, clock, reset, mem=self.mem)
self.read_if = AxiRamRead(entity, name, clock, reset, mem=self.mem)
def read_mem(self, address, length):
self.mem.seek(address)
return self.mem.read(length)
def write_mem(self, address, data):
self.mem.seek(address)
self.mem.write(bytes(data))
def hexdump(self, address, length, prefix=""):
hexdump(self.mem, address, length, prefix=prefix)
def hexdump_str(self, address, length, prefix=""):
return hexdump_str(self.mem, address, length, prefix=prefix)