Add transfer length checks

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2023-02-27 16:38:34 -08:00
parent 8604017159
commit bde123e05f
2 changed files with 21 additions and 0 deletions

View File

@@ -291,6 +291,9 @@ class AxiMasterWrite(Region, Reset):
if isinstance(data, int): if isinstance(data, int):
raise ValueError("Expected bytes or bytearray for data") raise ValueError("Expected bytes or bytearray for data")
if burst != AxiBurstType.FIXED and address+len(data) >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if awid is None or awid < 0: if awid is None or awid < 0:
awid = None awid = None
elif awid > self.id_count: elif awid > self.id_count:
@@ -357,6 +360,9 @@ class AxiMasterWrite(Region, Reset):
if isinstance(data, int): if isinstance(data, int):
raise ValueError("Expected bytes or bytearray for data") raise ValueError("Expected bytes or bytearray for data")
if burst != AxiBurstType.FIXED and address+len(data) >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if awid is None or awid < 0: if awid is None or awid < 0:
awid = None awid = None
elif awid > self.id_count: elif awid > self.id_count:
@@ -717,6 +723,9 @@ class AxiMasterRead(Region, Reset):
if length < 0: if length < 0:
raise ValueError("Read length must be positive") raise ValueError("Read length must be positive")
if burst != AxiBurstType.FIXED and address+length >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if arid is None or arid < 0: if arid is None or arid < 0:
arid = None arid = None
elif arid > self.id_count: elif arid > self.id_count:
@@ -771,6 +780,9 @@ class AxiMasterRead(Region, Reset):
if length < 0: if length < 0:
raise ValueError("Read length must be positive") raise ValueError("Read length must be positive")
if burst != AxiBurstType.FIXED and address+length >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if arid is None or arid < 0: if arid is None or arid < 0:
arid = None arid = None
elif arid > self.id_count: elif arid > self.id_count:

View File

@@ -182,6 +182,9 @@ class AxiLiteMasterWrite(Region, Reset):
if isinstance(data, int): if isinstance(data, int):
raise ValueError("Expected bytes or bytearray for data") raise ValueError("Expected bytes or bytearray for data")
if address+len(data) >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if not self.awprot_present and prot != AxiProt.NONSECURE: if not self.awprot_present and prot != AxiProt.NONSECURE:
raise ValueError("awprot sideband signal value specified, but signal is not connected") raise ValueError("awprot sideband signal value specified, but signal is not connected")
@@ -419,6 +422,12 @@ class AxiLiteMasterRead(Region, Reset):
if address < 0 or address >= 2**self.address_width: if address < 0 or address >= 2**self.address_width:
raise ValueError("Address out of range") raise ValueError("Address out of range")
if length < 0:
raise ValueError("Read length must be positive")
if address+length >= 2**self.address_width:
raise ValueError("Requested transfer overruns end of address space")
if not self.arprot_present and prot != AxiProt.NONSECURE: if not self.arprot_present and prot != AxiProt.NONSECURE:
raise ValueError("arprot sideband signal value specified, but signal is not connected") raise ValueError("arprot sideband signal value specified, but signal is not connected")