diff --git a/cocotbext/axi/axi_master.py b/cocotbext/axi/axi_master.py
index 97010cb..bfaec1b 100644
--- a/cocotbext/axi/axi_master.py
+++ b/cocotbext/axi/axi_master.py
@@ -291,7 +291,7 @@ class AxiMasterWrite(Region, Reset):
         if isinstance(data, int):
             raise ValueError("Expected bytes or bytearray for data")
 
-        if burst != AxiBurstType.FIXED and address+len(data) >= 2**self.address_width:
+        if burst != AxiBurstType.FIXED and address+len(data) > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if awid is None or awid < 0:
@@ -360,7 +360,7 @@ class AxiMasterWrite(Region, Reset):
         if isinstance(data, int):
             raise ValueError("Expected bytes or bytearray for data")
 
-        if burst != AxiBurstType.FIXED and address+len(data) >= 2**self.address_width:
+        if burst != AxiBurstType.FIXED and address+len(data) > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if awid is None or awid < 0:
@@ -723,7 +723,7 @@ class AxiMasterRead(Region, Reset):
         if length < 0:
             raise ValueError("Read length must be positive")
 
-        if burst != AxiBurstType.FIXED and address+length >= 2**self.address_width:
+        if burst != AxiBurstType.FIXED and address+length > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if arid is None or arid < 0:
@@ -780,7 +780,7 @@ class AxiMasterRead(Region, Reset):
         if length < 0:
             raise ValueError("Read length must be positive")
 
-        if burst != AxiBurstType.FIXED and address+length >= 2**self.address_width:
+        if burst != AxiBurstType.FIXED and address+length > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if arid is None or arid < 0:
diff --git a/cocotbext/axi/axil_master.py b/cocotbext/axi/axil_master.py
index f833362..1106177 100644
--- a/cocotbext/axi/axil_master.py
+++ b/cocotbext/axi/axil_master.py
@@ -159,6 +159,9 @@ class AxiLiteMasterWrite(Region, Reset):
         if isinstance(data, int):
             raise ValueError("Expected bytes or bytearray for data")
 
+        if address+len(data) > 2**self.address_width:
+            raise ValueError("Requested transfer overruns end of address space")
+
         if not self.awprot_present and prot != AxiProt.NONSECURE:
             raise ValueError("awprot sideband signal value specified, but signal is not connected")
 
@@ -182,7 +185,7 @@ class AxiLiteMasterWrite(Region, Reset):
         if isinstance(data, int):
             raise ValueError("Expected bytes or bytearray for data")
 
-        if address+len(data) >= 2**self.address_width:
+        if address+len(data) > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if not self.awprot_present and prot != AxiProt.NONSECURE:
@@ -404,6 +407,12 @@ class AxiLiteMasterRead(Region, Reset):
         if address < 0 or address >= 2**self.address_width:
             raise ValueError("Address out of range")
 
+        if length < 0:
+            raise ValueError("Read length must be positive")
+
+        if address+length > 2**self.address_width:
+            raise ValueError("Requested transfer overruns end of address space")
+
         if not self.arprot_present and prot != AxiProt.NONSECURE:
             raise ValueError("arprot sideband signal value specified, but signal is not connected")
 
@@ -425,7 +434,7 @@ class AxiLiteMasterRead(Region, Reset):
         if length < 0:
             raise ValueError("Read length must be positive")
 
-        if address+length >= 2**self.address_width:
+        if address+length > 2**self.address_width:
             raise ValueError("Requested transfer overruns end of address space")
 
         if not self.arprot_present and prot != AxiProt.NONSECURE: