diff --git a/tests/axi/test_axi.py b/tests/axi/test_axi.py
index fe3e97c..a27a7b5 100644
--- a/tests/axi/test_axi.py
+++ b/tests/axi/test_axi.py
@@ -106,7 +106,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None, si
 
             await tb.axi_master.write(addr, test_data, size=size)
 
-            tb.log.debug("%s", tb.axi_ram.hexdump_str((addr & 0xfffffff0)-16, (((addr & 0xf)+length-1) & 0xfffffff0)+48))
+            tb.log.debug("%s", tb.axi_ram.hexdump_str((addr & ~0xf)-16, (((addr & 0xf)+length-1) & ~0xf)+48))
 
             assert tb.axi_ram.read(addr, length) == test_data
             assert tb.axi_ram.read(addr-1, 1) == b'\xaa'
diff --git a/tests/axil/test_axil.py b/tests/axil/test_axil.py
index 70a85a6..049ffb8 100644
--- a/tests/axil/test_axil.py
+++ b/tests/axil/test_axil.py
@@ -99,7 +99,7 @@ async def run_test_write(dut, data_in=None, idle_inserter=None, backpressure_ins
 
             await tb.axil_master.write(addr, test_data)
 
-            tb.log.debug("%s", tb.axil_ram.hexdump_str((addr & 0xfffffff0)-16, (((addr & 0xf)+length-1) & 0xfffffff0)+48))
+            tb.log.debug("%s", tb.axil_ram.hexdump_str((addr & ~0xf)-16, (((addr & 0xf)+length-1) & ~0xf)+48))
 
             assert tb.axil_ram.read(addr, length) == test_data
             assert tb.axil_ram.read(addr-1, 1) == b'\xaa'