Alex Forencich
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ea2ee23e0f
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Add awid/arid parameters to control ID signal, rework ID assignment and tracking
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2020-11-29 14:10:56 -08:00 |
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Alex Forencich
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5c94ed2cca
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Improve parameter validation
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2020-11-29 14:02:48 -08:00 |
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Alex Forencich
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1d5ec5e2b6
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Move size parameter validation
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2020-11-28 16:50:47 -08:00 |
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Alex Forencich
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f12ce696be
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Add helper objects for AXI masters
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2020-11-27 02:08:23 -08:00 |
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Alex Forencich
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e5076e700c
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Log model configuration information
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2020-11-26 21:15:37 -08:00 |
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Alex Forencich
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7f68f5e73f
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Bring out max_burst_len as a parameter in AXI master model
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2020-11-26 21:01:40 -08:00 |
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Alex Forencich
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81f8906548
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Clean up and lint removal
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2020-11-26 19:51:24 -08:00 |
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Alex Forencich
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2d3ad7658b
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Fix exception when tready not connected
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2020-11-26 01:26:19 -08:00 |
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Alex Forencich
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96feba1016
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Print version information in debug output
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2020-11-22 23:09:20 -08:00 |
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Alex Forencich
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306b09f967
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Pull out common functionality into StreamBase and StreamPause
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2020-11-22 23:08:15 -08:00 |
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Alex Forencich
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f2995d716e
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Dump FST traces with Verilator
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2020-11-18 00:34:41 -08:00 |
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Alex Forencich
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ca57cdb198
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Rework testbench logging
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2020-11-17 17:07:56 -08:00 |
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Alex Forencich
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f1648ccf78
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Change timescale to speed up verilator
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2020-11-15 13:09:53 -08:00 |
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Alex Forencich
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f258ce0f6a
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Set python_search instead of work_dir
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2020-11-15 12:46:34 -08:00 |
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Alex Forencich
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69fa7aa7c9
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Add tests
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2020-11-15 02:46:32 -08:00 |
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Alex Forencich
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67c6093152
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Change log level for word operations on AXI RAM
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2020-11-15 02:33:36 -08:00 |
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Alex Forencich
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4abe02086a
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Add hexdump methods to AXI RAM models
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2020-11-14 22:47:36 -08:00 |
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Alex Forencich
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9d4b8eb125
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Add hexdump utility functions
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2020-11-14 22:44:09 -08:00 |
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Alex Forencich
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d4f53abeec
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Set default unit to ns
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2020-11-14 22:39:16 -08:00 |
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Alex Forencich
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028acd6c2d
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Minor reorganization
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2020-11-14 01:29:24 -08:00 |
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Alex Forencich
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62bcaaf6bf
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Update readme
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2020-11-12 19:15:21 -08:00 |
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Alex Forencich
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02de500b1e
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Add word access methods to AXI master models
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2020-11-12 19:14:31 -08:00 |
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Alex Forencich
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fff9781181
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Strip unnecessary fields for blocking operations
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2020-11-12 19:07:15 -08:00 |
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Alex Forencich
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c23e9f962b
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Inline init
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2020-11-12 18:25:53 -08:00 |
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Alex Forencich
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4feef78988
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Add full() to AXI stream sink
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2020-11-12 18:25:05 -08:00 |
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Alex Forencich
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ea6d9090ca
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Add all signals to transaction object
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2020-11-12 18:17:32 -08:00 |
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Alex Forencich
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f575a975d0
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Add missing imports
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2020-11-12 18:16:36 -08:00 |
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Alex Forencich
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900d734853
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No FIFO on AW/AR channels
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2020-10-26 23:47:19 -07:00 |
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Alex Forencich
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f4a13f6e8a
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Implement generators for source and sink pausing
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2020-10-26 23:31:09 -07:00 |
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Alex Forencich
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ac27b1d69a
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Convert values to integers
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2020-10-26 22:49:57 -07:00 |
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Alex Forencich
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0c9cd9084c
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Fix pause handling
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2020-10-26 13:34:02 -07:00 |
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Alex Forencich
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c7783ef7c0
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Implement transaction object init and repr
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2020-10-23 00:29:51 -07:00 |
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Alex Forencich
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344eae4b82
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Include signal names in transaction objects
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2020-10-23 00:23:03 -07:00 |
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Alex Forencich
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ca88fa3a31
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Add missing initializers
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2020-10-22 23:33:36 -07:00 |
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Alex Forencich
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182f1e2380
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Correctly handle None
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2020-10-22 23:27:58 -07:00 |
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Alex Forencich
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5478f1479a
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More efficient waiting
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2020-10-22 23:27:41 -07:00 |
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Alex Forencich
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db5c34816f
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Use new channel objects
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2020-10-22 11:31:06 -07:00 |
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Alex Forencich
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44eb2971db
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Add AXI channel definitions
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2020-10-22 11:30:48 -07:00 |
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Alex Forencich
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a9e0561eba
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Add generic stream classes
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2020-10-21 23:54:54 -07:00 |
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Alex Forencich
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86ba3ab5bf
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Handle bus object directly
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2020-10-21 20:33:42 -07:00 |
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Alex Forencich
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46ff5a52a8
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Add missing return
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2020-10-21 15:49:54 -07:00 |
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Alex Forencich
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7851565206
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Remove extraneous checks
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2020-10-21 15:44:42 -07:00 |
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Alex Forencich
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35ff3fa3b6
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Initial commit
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2020-10-19 14:54:41 -07:00 |
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