bslathi19/cocotbext-eth
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases 2 Wiki Activity

Cache clock edge event objects

Browse Source
This commit is contained in:
Alex Forencich
2021-12-03 19:06:43 -08:00
parent 3325568406
commit 2af7852006
12 changed files with 68 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
tests/gmii/test_gmii.py
View File

@@ -82,9 +82,11 @@ class TB:
self.set_enable_generator(None)
async def _run_enable(self):
clock_edge_event = RisingEdge(self.dut.clk)
for val in self._enable_generator:
self.dut.gmii_clk_en <= val
await RisingEdge(self.dut.clk)
await clock_edge_event
async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None, mii_sel=False):

4
tests/mii/test_mii.py
View File

@@ -81,9 +81,11 @@ class TB:
self.set_enable_generator(None)
async def _run_enable(self):
clock_edge_event = RisingEdge(self.dut.clk)
for val in self._enable_generator:
self.dut.mii_clk_en <= val
await RisingEdge(self.dut.clk)
await clock_edge_event
async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None):

14
tests/ptp_clock/test_ptp_clock.py
View File

@@ -30,7 +30,7 @@ import cocotb_test.simulator
import cocotb
from cocotb.clock import Clock
from cocotb.triggers import RisingEdge
from cocotb.triggers import RisingEdge, ClockCycles
from cocotb.utils import get_sim_time
from cocotbext.eth import PtpClock
@@ -79,8 +79,7 @@ async def run_default_rate(dut):
start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
start_ts_64 = dut.ts_64.value.integer/2**16*1e-9
for k in range(10000):
await RisingEdge(dut.clk)
await ClockCycles(dut.clk, 10000)
stop_time = get_sim_time('sec')
stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
@@ -126,8 +125,7 @@ async def run_load_timestamps(dut):
start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
start_ts_64 = dut.ts_64.value.integer/2**16*1e-9
for k in range(2000):
await RisingEdge(dut.clk)
await ClockCycles(dut.clk, 2000)
stop_time = get_sim_time('sec')
stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
@@ -221,8 +219,7 @@ async def run_frequency_adjustment(dut):
start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
start_ts_64 = dut.ts_64.value.integer/2**16*1e-9
for k in range(10000):
await RisingEdge(dut.clk)
await ClockCycles(dut.clk, 10000)
stop_time = get_sim_time('sec')
stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
@@ -264,8 +261,7 @@ async def run_drift_adjustment(dut):
start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
start_ts_64 = dut.ts_64.value.integer/2**16*1e-9
for k in range(10000):
await RisingEdge(dut.clk)
await ClockCycles(dut.clk, 10000)
stop_time = get_sim_time('sec')
stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)

5
tests/ptp_clock_sim_time/test_ptp_clock_sim_time.py
View File

@@ -30,7 +30,7 @@ import cocotb_test.simulator
import cocotb
from cocotb.clock import Clock
from cocotb.triggers import RisingEdge
from cocotb.triggers import RisingEdge, ClockCycles
from cocotb.utils import get_sim_time
from cocotbext.eth import PtpClockSimTime
@@ -66,8 +66,7 @@ async def run_test(dut):
start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)
start_ts_64 = dut.ts_64.value.integer/2**16*1e-9
for k in range(10000):
await RisingEdge(dut.clk)
await ClockCycles(dut.clk, 10000)
stop_time = get_sim_time('sec')
stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9)

4
tests/rgmii/test_rgmii.py
View File

@@ -80,9 +80,11 @@ class TB:
self.set_enable_generator(None)
async def _run_enable(self):
clock_edge_event = RisingEdge(self.dut.clk)
for val in self._enable_generator:
self.dut.rgmii_clk_en <= val
await RisingEdge(self.dut.clk)
await clock_edge_event
async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None, mii_sel=False):

4
tests/xgmii/test_xgmii.py
View File

@@ -80,9 +80,11 @@ class TB:
self.set_enable_generator(None)
async def _run_enable(self):
clock_edge_event = RisingEdge(self.dut.clk)
for val in self._enable_generator:
self.dut.xgmii_clk_en <= val
await RisingEdge(self.dut.clk)
await clock_edge_event
async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_dic=True,