Testbench cleanup for cocotb 2.0
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -27,8 +27,10 @@ COCOTB_HDL_TIMEUNIT = 1ns
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COCOTB_HDL_TIMEPRECISION = 1ns
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DUT = test_eth_mac
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TOPLEVEL = $(DUT)
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MODULE = $(DUT)
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COCOTB_TEST_MODULES = $(DUT)
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COCOTB_TOPLEVEL = $(DUT)
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MODULE = $(COCOTB_TEST_MODULES)
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TOPLEVEL = $(COCOTB_TOPLEVEL)
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VERILOG_SOURCES += $(DUT).v
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# module parameters
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@@ -42,32 +44,14 @@ export PARAM_AXIS_RX_USER_WIDTH := $(shell expr $(PARAM_PTP_TS_WIDTH) + 1 )
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ifeq ($(SIM), icarus)
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PLUSARGS += -fst
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COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v)))
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ifeq ($(WAVES), 1)
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VERILOG_SOURCES += iverilog_dump.v
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COMPILE_ARGS += -s iverilog_dump
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endif
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COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(COCOTB_TOPLEVEL).$(subst PARAM_,,$(v))=$($(v)))
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else ifeq ($(SIM), verilator)
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COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH
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COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v)))
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ifeq ($(WAVES), 1)
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COMPILE_ARGS += --trace-fst
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VERILATOR_TRACE = 1
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endif
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endif
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include $(shell cocotb-config --makefiles)/Makefile.sim
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iverilog_dump.v:
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echo 'module iverilog_dump();' > $@
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echo 'initial begin' >> $@
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echo ' $$dumpfile("$(TOPLEVEL).fst");' >> $@
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echo ' $$dumpvars(0, $(TOPLEVEL));' >> $@
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echo 'end' >> $@
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echo 'endmodule' >> $@
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clean::
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@rm -rf iverilog_dump.v
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@rm -rf dump.fst $(TOPLEVEL).fst
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include $(shell cocotb-config --makefiles)/Makefile.sim
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@@ -168,7 +168,7 @@ def incrementing_payload(length):
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return bytearray(itertools.islice(itertools.cycle(range(256)), length))
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if cocotb.SIM_NAME:
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if getattr(cocotb, 'top', None) is not None:
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if len(cocotb.top.tx_axis_tdata) == 8:
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speed = [100e6, 1e9]
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