Parametrize EthMac test

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2023-05-26 17:18:16 -07:00
parent 08fd179dac
commit 9079ca34f2
3 changed files with 71 additions and 25 deletions

View File

@@ -31,6 +31,14 @@ TOPLEVEL = $(DUT)
MODULE = $(DUT) MODULE = $(DUT)
VERILOG_SOURCES += $(DUT).v VERILOG_SOURCES += $(DUT).v
# module parameters
export PARAM_PTP_TS_WIDTH := 96
export PARAM_PTP_TAG_WIDTH := 16
export PARAM_AXIS_DATA_WIDTH := 64
export PARAM_AXIS_KEEP_WIDTH := $(shell expr $(PARAM_AXIS_DATA_WIDTH) / 8 )
export PARAM_AXIS_TX_USER_WIDTH := $(shell expr $(PARAM_PTP_TAG_WIDTH) + 1 )
export PARAM_AXIS_RX_USER_WIDTH := $(shell expr $(PARAM_PTP_TS_WIDTH) + 1 )
ifeq ($(SIM), icarus) ifeq ($(SIM), icarus)
PLUSARGS += -fst PLUSARGS += -fst

View File

@@ -28,6 +28,7 @@ import logging
import os import os
import cocotb_test.simulator import cocotb_test.simulator
import pytest
import cocotb import cocotb
from cocotb.clock import Clock from cocotb.clock import Clock
@@ -45,8 +46,20 @@ class TB:
self.log = logging.getLogger("cocotb.tb") self.log = logging.getLogger("cocotb.tb")
self.log.setLevel(logging.DEBUG) self.log.setLevel(logging.DEBUG)
cocotb.start_soon(Clock(dut.tx_clk, 6.4, units="ns").start()) if len(dut.tx_axis_tdata) == 8:
cocotb.start_soon(Clock(dut.rx_clk, 6.4, units="ns").start()) clk_period = 8
elif len(dut.tx_axis_tdata) == 32:
clk_period = 3.102
elif len(dut.tx_axis_tdata) == 64:
if speed == 25e9:
clk_period = 2.56
else:
clk_period = 6.206
elif len(dut.tx_axis_tdata) == 512:
clk_period = 3.102
cocotb.start_soon(Clock(dut.tx_clk, clk_period, units="ns").start())
cocotb.start_soon(Clock(dut.rx_clk, clk_period, units="ns").start())
self.mac = EthMac( self.mac = EthMac(
tx_clk=dut.tx_clk, tx_clk=dut.tx_clk,
@@ -157,12 +170,21 @@ def incrementing_payload(length):
if cocotb.SIM_NAME: if cocotb.SIM_NAME:
if len(cocotb.top.tx_axis_tdata) == 8:
speed = [100e6, 1e9]
elif len(cocotb.top.tx_axis_tdata) == 32:
speed = [10e9]
elif len(cocotb.top.tx_axis_tdata) == 64:
speed = [10e9, 25e9]
elif len(cocotb.top.tx_axis_tdata) == 512:
speed = [100e9]
for test in [run_test_tx, run_test_rx]: for test in [run_test_tx, run_test_rx]:
factory = TestFactory(test) factory = TestFactory(test)
factory.add_option("payload_lengths", [size_list]) factory.add_option("payload_lengths", [size_list])
factory.add_option("payload_data", [incrementing_payload]) factory.add_option("payload_data", [incrementing_payload])
factory.add_option("speed", [10e9, 1e9]) factory.add_option("speed", speed)
factory.generate_tests() factory.generate_tests()
@@ -171,7 +193,8 @@ if cocotb.SIM_NAME:
tests_dir = os.path.dirname(__file__) tests_dir = os.path.dirname(__file__)
def test_eth_mac(request): @pytest.mark.parametrize("data_width", [8, 32, 64, 512])
def test_eth_mac(request, data_width):
dut = "test_eth_mac" dut = "test_eth_mac"
module = os.path.splitext(os.path.basename(__file__))[0] module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut toplevel = dut
@@ -182,6 +205,13 @@ def test_eth_mac(request):
parameters = {} parameters = {}
parameters['PTP_TS_WIDTH'] = 96
parameters['PTP_TAG_WIDTH'] = 16
parameters['AXIS_DATA_WIDTH'] = data_width
parameters['AXIS_KEEP_WIDTH'] = parameters['AXIS_DATA_WIDTH'] // 8
parameters['AXIS_TX_USER_WIDTH'] = parameters['PTP_TAG_WIDTH']+1
parameters['AXIS_RX_USER_WIDTH'] = parameters['PTP_TS_WIDTH']+1
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
sim_build = os.path.join(tests_dir, "sim_build", sim_build = os.path.join(tests_dir, "sim_build",

View File

@@ -29,29 +29,37 @@ THE SOFTWARE.
/* /*
* Ethernet MAC model test * Ethernet MAC model test
*/ */
module test_eth_mac module test_eth_mac #
( (
inout wire tx_clk, parameter PTP_TS_WIDTH = 96,
inout wire tx_rst, parameter PTP_TAG_WIDTH = 16,
inout wire [63:0] tx_axis_tdata, parameter AXIS_DATA_WIDTH = 64,
inout wire [7:0] tx_axis_tkeep, parameter AXIS_KEEP_WIDTH = (AXIS_DATA_WIDTH/8),
inout wire tx_axis_tlast, parameter AXIS_TX_USER_WIDTH = PTP_TAG_WIDTH+1,
inout wire [16:0] tx_axis_tuser, parameter AXIS_RX_USER_WIDTH = PTP_TS_WIDTH+1
inout wire tx_axis_tvalid, )
inout wire tx_axis_tready, (
inout wire [95:0] tx_ptp_time, inout wire tx_clk,
inout wire [95:0] tx_ptp_ts, inout wire tx_rst,
inout wire [15:0] tx_ptp_ts_tag, inout wire [AXIS_DATA_WIDTH-1:0] tx_axis_tdata,
inout wire tx_ptp_ts_valid, inout wire [AXIS_KEEP_WIDTH-1:0] tx_axis_tkeep,
inout wire tx_axis_tlast,
inout wire [AXIS_TX_USER_WIDTH-1:0] tx_axis_tuser,
inout wire tx_axis_tvalid,
inout wire tx_axis_tready,
inout wire [PTP_TS_WIDTH-1:0] tx_ptp_time,
inout wire [PTP_TS_WIDTH-1:0] tx_ptp_ts,
inout wire [PTP_TAG_WIDTH-1:0] tx_ptp_ts_tag,
inout wire tx_ptp_ts_valid,
inout wire rx_clk, inout wire rx_clk,
inout wire rx_rst, inout wire rx_rst,
inout wire [63:0] rx_axis_tdata, inout wire [AXIS_DATA_WIDTH-1:0] rx_axis_tdata,
inout wire [7:0] rx_axis_tkeep, inout wire [AXIS_KEEP_WIDTH-1:0] rx_axis_tkeep,
inout wire rx_axis_tlast, inout wire rx_axis_tlast,
inout wire [96:0] rx_axis_tuser, inout wire [AXIS_RX_USER_WIDTH-1:0] rx_axis_tuser,
inout wire rx_axis_tvalid, inout wire rx_axis_tvalid,
inout wire [95:0] rx_ptp_time inout wire [PTP_TS_WIDTH-1:0] rx_ptp_time
); );
endmodule endmodule