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6 Commits
| Author | SHA1 | Date | |
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6a35c31b4b | ||
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73fe54705f | ||
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448451e274 | ||
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21c2c05c57 | ||
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ab84a3b100 | ||
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0f3060b9ba |
@@ -42,12 +42,12 @@ class XgmiiCtrl(enum.IntEnum):
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TERM = 0xfd
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ERROR = 0xfe
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SEQ_OS = 0x9c
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RES0 = 0x1c
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RES1 = 0x3c
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RES2 = 0x7c
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RES3 = 0xbc
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RES4 = 0xdc
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RES5 = 0xf7
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RES_0 = 0x1c
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RES_1 = 0x3c
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RES_2 = 0x7c
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RES_3 = 0xbc
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RES_4 = 0xdc
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RES_5 = 0xf7
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SIG_OS = 0x5c
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@@ -93,3 +93,41 @@ class BaseRBlockType(enum.IntEnum):
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TERM_5 = 0xd2 # C7 C6 D4 D3 D2 D1 D0 BT
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TERM_6 = 0xe1 # C7 D5 D4 D3 D2 D1 D0 BT
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TERM_7 = 0xff # D6 D5 D4 D3 D2 D1 D0 BT
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xgmii_ctrl_to_baser_mapping = {
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XgmiiCtrl.IDLE: BaseRCtrl.IDLE,
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XgmiiCtrl.LPI: BaseRCtrl.LPI,
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XgmiiCtrl.ERROR: BaseRCtrl.ERROR,
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XgmiiCtrl.RES_0: BaseRCtrl.RES_0,
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XgmiiCtrl.RES_1: BaseRCtrl.RES_1,
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XgmiiCtrl.RES_2: BaseRCtrl.RES_2,
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XgmiiCtrl.RES_3: BaseRCtrl.RES_3,
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XgmiiCtrl.RES_4: BaseRCtrl.RES_4,
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XgmiiCtrl.RES_5: BaseRCtrl.RES_5,
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}
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baser_ctrl_to_xgmii_mapping = {
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BaseRCtrl.IDLE: XgmiiCtrl.IDLE,
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BaseRCtrl.LPI: XgmiiCtrl.LPI,
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BaseRCtrl.ERROR: XgmiiCtrl.ERROR,
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BaseRCtrl.RES_0: XgmiiCtrl.RES_0,
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BaseRCtrl.RES_1: XgmiiCtrl.RES_1,
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BaseRCtrl.RES_2: XgmiiCtrl.RES_2,
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BaseRCtrl.RES_3: XgmiiCtrl.RES_3,
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BaseRCtrl.RES_4: XgmiiCtrl.RES_4,
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BaseRCtrl.RES_5: XgmiiCtrl.RES_5,
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}
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block_type_term_lane_mapping = {
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BaseRBlockType.TERM_0: 0,
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BaseRBlockType.TERM_1: 1,
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BaseRBlockType.TERM_2: 2,
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BaseRBlockType.TERM_3: 3,
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BaseRBlockType.TERM_4: 4,
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BaseRBlockType.TERM_5: 5,
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BaseRBlockType.TERM_6: 6,
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BaseRBlockType.TERM_7: 7,
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}
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@@ -253,7 +253,7 @@ class EthMacTx(Reset):
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self._run_ts_cr = None
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if self.ptp_ts_valid:
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self.ptp_ts_valid <= 0
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self.ptp_ts_valid.value = 0
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self.active = False
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@@ -324,14 +324,14 @@ class EthMacTx(Reset):
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async def _run_ts(self):
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while True:
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await RisingEdge(self.clock)
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self.ptp_ts_valid <= 0
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self.ptp_ts_valid.value = 0
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if not self.ts_queue.empty():
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ts, tag = self.ts_queue.get_nowait()
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self.ptp_ts <= ts
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self.ptp_ts.value = ts
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if self.ptp_ts_tag is not None:
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self.ptp_ts_tag <= tag
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self.ptp_ts_valid <= 1
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self.ptp_ts_tag.value = tag
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self.ptp_ts_valid.value = 1
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class EthMacRx(Reset):
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@@ -239,10 +239,10 @@ class GmiiSource(Reset):
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self._run_cr = None
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self.active = False
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self.data <= 0
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self.data.value = 0
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if self.er is not None:
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self.er <= 0
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self.dv <= 0
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self.er.value = 0
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self.dv.value = 0
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if self.current_frame:
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self.log.warning("Flushed transmit frame during reset: %s", self.current_frame)
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@@ -308,10 +308,10 @@ class GmiiSource(Reset):
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d = frame_data[frame_offset]
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if frame.sim_time_sfd is None and d in (EthPre.SFD, 0xD):
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frame.sim_time_sfd = get_sim_time()
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self.data <= d
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self.data.value = d
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if self.er is not None:
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self.er <= frame_error[frame_offset]
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self.dv <= 1
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self.er.value = frame_error[frame_offset]
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self.dv.value = 1
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frame_offset += 1
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if frame_offset >= len(frame_data):
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@@ -321,10 +321,10 @@ class GmiiSource(Reset):
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frame = None
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self.current_frame = None
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else:
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self.data <= 0
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self.data.value = 0
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if self.er is not None:
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self.er <= 0
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self.dv <= 0
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self.er.value = 0
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self.dv.value = 0
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self.active = False
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self.idle_event.set()
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@@ -536,8 +536,8 @@ class GmiiPhy:
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while True:
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await t
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self.rx_clk <= 1
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self.tx_clk <= 1
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self.rx_clk.value = 1
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self.tx_clk.value = 1
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await t
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self.rx_clk <= 0
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self.tx_clk <= 0
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self.rx_clk.value = 0
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self.tx_clk.value = 0
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@@ -140,10 +140,10 @@ class MiiSource(Reset):
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self._run_cr = None
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self.active = False
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self.data <= 0
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self.data.value = 0
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if self.er is not None:
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self.er <= 0
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self.dv <= 0
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self.er.value = 0
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self.dv.value = 0
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if self.current_frame:
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self.log.warning("Flushed transmit frame during reset: %s", self.current_frame)
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@@ -202,10 +202,10 @@ class MiiSource(Reset):
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d = frame_data[frame_offset]
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if frame.sim_time_sfd is None and d == 0xD:
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frame.sim_time_sfd = get_sim_time()
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self.data <= d
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self.data.value = d
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if self.er is not None:
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self.er <= frame_error[frame_offset]
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self.dv <= 1
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self.er.value = frame_error[frame_offset]
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self.dv.value = 1
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frame_offset += 1
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if frame_offset >= len(frame_data):
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@@ -215,10 +215,10 @@ class MiiSource(Reset):
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frame = None
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self.current_frame = None
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else:
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self.data <= 0
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self.data.value = 0
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if self.er is not None:
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self.er <= 0
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self.dv <= 0
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self.er.value = 0
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self.dv.value = 0
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self.active = False
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self.idle_event.set()
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@@ -410,8 +410,8 @@ class MiiPhy:
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while True:
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await t
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self.tx_clk <= 1
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self.rx_clk <= 1
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self.tx_clk.value = 1
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self.rx_clk.value = 1
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await t
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self.tx_clk <= 0
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self.rx_clk <= 0
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self.tx_clk.value = 0
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self.rx_clk.value = 0
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@@ -195,13 +195,13 @@ class PtpClock(Reset):
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self.ts_64_fns = 0
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self.drift_cnt = 0
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if self.ts_96 is not None:
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self.ts_96 <= 0
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self.ts_96.value = 0
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if self.ts_64 is not None:
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self.ts_64 <= 0
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self.ts_64.value = 0
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if self.ts_step is not None:
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self.ts_step <= 0
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self.ts_step.value = 0
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if self.pps is not None:
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self.pps <= 0
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self.pps.value = 0
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else:
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self.log.info("Reset de-asserted")
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if self._run_cr is None:
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@@ -212,11 +212,11 @@ class PtpClock(Reset):
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await RisingEdge(self.clock)
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if self.ts_step is not None:
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self.ts_step <= self.ts_updated
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self.ts_step.value = self.ts_updated
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self.ts_updated = False
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if self.pps is not None:
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self.pps <= 0
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self.pps.value = 0
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# increment 96 bit timestamp
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if self.ts_96 is not None or self.pps is not None:
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@@ -229,13 +229,13 @@ class PtpClock(Reset):
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self.ts_96_s += 1
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t -= (1000000000 << 16)
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if self.pps is not None:
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self.pps <= 1
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self.pps.value = 1
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self.ts_96_fns = t & 0xffff
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self.ts_96_ns = t >> 16
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if self.ts_96 is not None:
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self.ts_96 <= (self.ts_96_s << 48) | (self.ts_96_ns << 16) | (self.ts_96_fns)
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self.ts_96.value = (self.ts_96_s << 48) | (self.ts_96_ns << 16) | (self.ts_96_fns)
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# increment 64 bit timestamp
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if self.ts_64 is not None:
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@@ -247,7 +247,7 @@ class PtpClock(Reset):
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self.ts_64_fns = t & 0xffff
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self.ts_64_ns = t >> 16
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self.ts_64 <= (self.ts_64_ns << 16) | self.ts_64_fns
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self.ts_64.value = (self.ts_64_ns << 16) | self.ts_64_fns
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if self.drift_rate:
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if self.drift_cnt > 0:
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@@ -286,7 +286,7 @@ class PtpClockSimTime:
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if self.ts_64 is not None:
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self.ts_64.setimmediatevalue(0)
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if self.pps is not None:
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self.pps <= 0
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self.pps.value = 0
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self._run_cr = cocotb.fork(self._run())
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@@ -321,12 +321,12 @@ class PtpClockSimTime:
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self.ts_96_fns = self.ts_64_fns
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if self.ts_96 is not None:
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self.ts_96 <= (self.ts_96_s << 48) | (self.ts_96_ns << 16) | self.ts_96_fns
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self.ts_96.value = (self.ts_96_s << 48) | (self.ts_96_ns << 16) | self.ts_96_fns
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if self.ts_64 is not None:
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self.ts_64 <= (self.ts_64_ns << 16) | self.ts_64_fns
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self.ts_64.value = (self.ts_64_ns << 16) | self.ts_64_fns
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if self.pps is not None:
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self.pps <= int(self.last_ts_96_s != self.ts_96_s)
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self.pps.value = int(self.last_ts_96_s != self.ts_96_s)
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self.last_ts_96_s = self.ts_96_s
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@@ -140,8 +140,8 @@ class RgmiiSource(Reset):
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self._run_cr = None
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self.active = False
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self.data <= 0
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self.ctrl <= 0
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self.data.value = 0
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self.ctrl.value = 0
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if self.current_frame:
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self.log.warning("Flushed transmit frame during reset: %s", self.current_frame)
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@@ -170,8 +170,8 @@ class RgmiiSource(Reset):
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await RisingEdge(self.clock)
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# send high nibble after rising edge, leading in to falling edge
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self.data <= d >> 4
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self.ctrl <= en ^ er
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self.data.value = d >> 4
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self.ctrl.value = en ^ er
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if self.enable is None or self.enable.value:
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if ifg_cnt > 0:
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@@ -235,8 +235,8 @@ class RgmiiSource(Reset):
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await FallingEdge(self.clock)
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# send low nibble after falling edge, leading in to rising edge
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self.data <= d & 0x0F
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self.ctrl <= en
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self.data.value = d & 0x0F
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self.ctrl.value = en
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class RgmiiSink(Reset):
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@@ -448,6 +448,6 @@ class RgmiiPhy:
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while True:
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await t
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self.rx_clk <= 1
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self.rx_clk.value = 1
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await t
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self.rx_clk <= 0
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self.rx_clk.value = 0
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@@ -1 +1 @@
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__version__ = "0.1.16"
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__version__ = "0.1.18"
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@@ -250,8 +250,8 @@ class XgmiiSource(Reset):
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self._run_cr = None
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self.active = False
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self.data <= 0
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self.ctrl <= 0
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self.data.value = 0
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self.ctrl.value = 0
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if self.current_frame:
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self.log.warning("Flushed transmit frame during reset: %s", self.current_frame)
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@@ -351,11 +351,11 @@ class XgmiiSource(Reset):
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d_val |= XgmiiCtrl.IDLE << k*8
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c_val |= 1 << k
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self.data <= d_val
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self.ctrl <= c_val
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self.data.value = d_val
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self.ctrl.value = c_val
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else:
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self.data <= self.idle_d
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self.ctrl <= self.idle_c
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self.data.value = self.idle_d
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self.ctrl.value = self.idle_c
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self.active = False
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self.idle_event.set()
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@@ -17,9 +17,10 @@ long-description-content-type = text/markdown
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platforms = any
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classifiers =
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Development Status :: 3 - Alpha
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Programming Language :: Python :: 3
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Framework :: cocotb
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License :: OSI Approved :: MIT License
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Operating System :: OS Independent
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Programming Language :: Python :: 3
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Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
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[options]
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Reference in New Issue
Block a user