Add correct amount of memory

should be 160, not 20. There are 8 cycles per stage and 20 stages
This commit is contained in:
Byron Lathi
2025-06-29 13:29:38 -07:00
parent 4c7badbbbb
commit 196ea8e6d3
3 changed files with 79 additions and 25 deletions

View File

@@ -21,6 +21,9 @@ module chacha20_block #(
input logic i_ready
);
// each round is 8 stages
localparam PIPE_STAGES = ROUNDS * 8;
`define QR(name, i, n, a, b, c, d) \
chacha20_qr u_chacha20_``name ( \
.i_clk (i_clk), \
@@ -49,9 +52,9 @@ logic [3:0] valid[ROUNDS+1];
// small fifo for storing the initial state.
// better to store it in a memory than in flops
logic [$clog2(ROUNDS)-1:0] initial_state_wptr;
logic [$clog2(ROUNDS)-1:0] initial_state_rptr;
logic [511:0] initial_states [ROUNDS];
logic [$clog2(PIPE_STAGES)-1:0] initial_state_wptr;
logic [$clog2(PIPE_STAGES)-1:0] initial_state_rptr;
logic [511:0] initial_states [PIPE_STAGES];
logic [511:0] state_pre_add;
logic pre_add_valid;
@@ -67,12 +70,22 @@ always_ff @(posedge i_clk) begin
end else begin
if (i_valid) begin
initial_states[initial_state_wptr] <= write_initial_state;
if (initial_state_wptr < PIPE_STAGES-1) begin
initial_state_wptr <= initial_state_wptr + 1;
end else begin
initial_state_wptr <= '0;
end
end
pre_add_valid <= valid[ROUNDS][0];
if (valid[ROUNDS][0]) begin
read_initial_state <= initial_states[initial_state_rptr];
if (initial_state_rptr < PIPE_STAGES-1) begin
initial_state_rptr <= initial_state_rptr + 1;
end else begin
initial_state_rptr <= '0;
end
for (int i = 0; i < 16; i++) begin
state_pre_add[i*32 +: 32] <= state[ROUNDS][i];
end