Get poly1305 core to kind of work
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7
ChaCha20_Poly1305_64/sim/poly1305.yaml
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7
ChaCha20_Poly1305_64/sim/poly1305.yaml
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tests:
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- name: "poly1305_core"
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toplevel: "poly1305_core_harness"
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modules:
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- "poly1305_core"
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sources: "sources.list"
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waves: True
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73
ChaCha20_Poly1305_64/sim/poly1305_core.py
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73
ChaCha20_Poly1305_64/sim/poly1305_core.py
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import logging
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import Timer, RisingEdge, FallingEdge
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from cocotb.queue import Queue
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from cocotbext.axi import AxiStreamBus, AxiStreamSource
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CLK_PERIOD = 4
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class TB:
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def __init__(self, dut):
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self.dut = dut
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.INFO)
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cocotb.start_soon(Clock(self.dut.i_clk, CLK_PERIOD, units="ns").start())
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self.s_data_axis = AxiStreamSource(AxiStreamBus.from_prefix(dut.s_data_axis, ""), dut.i_clk, dut.i_rst)
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async def cycle_reset(self):
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await self._cycle_reset(self.dut.i_rst, self.dut.i_clk)
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async def _cycle_reset(self, rst, clk):
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rst.setimmediatevalue(0)
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await RisingEdge(clk)
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await RisingEdge(clk)
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rst.value = 1
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await RisingEdge(clk)
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await RisingEdge(clk)
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rst.value = 0
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await RisingEdge(clk)
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await RisingEdge(clk)
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@cocotb.test
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async def test_sanity(dut):
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tb = TB(dut)
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await tb.cycle_reset()
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s = 0x1bf54941aff6bf4afdb20dfb8a800301
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r = 0xa806d542fe52447f336d555778bed685
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r_masked = 0x0806d5400e52447c036d555408bed685
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result = 0xa927010caf8b2bc2c6365130c11d06a8
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msg = b"Cryptographic Forum Research Group"
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tb.dut.i_otk.value = ((r << 128) | s)
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tb.dut.i_otk_valid.value = 1
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await RisingEdge(tb.dut.i_clk)
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tb.dut.i_otk_valid.value = 0
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await RisingEdge(tb.dut.i_clk)
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dut_s = tb.dut.u_dut.poly1305_s.value.integer
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dut_r = tb.dut.u_dut.poly1305_r.value.integer
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assert dut_s == s
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assert dut_r == r_masked
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await tb.s_data_axis.send(msg)
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await RisingEdge(tb.dut.o_tag_valid)
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tag = tb.dut.o_tag.value.integer
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tb.log.info(f"tag: {tag:x}")
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await Timer(1, "us")
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26
ChaCha20_Poly1305_64/sim/poly1305_core_harness.sv
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26
ChaCha20_Poly1305_64/sim/poly1305_core_harness.sv
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module poly1305_core_harness();
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taxi_axis_if #(.DATA_W(128)) s_data_axis();
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logic i_clk;
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logic i_rst;
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logic [255:0] i_otk;
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logic i_otk_valid;
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logic [127:0] o_tag;
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logic o_tag_valid;
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poly1305_core u_dut (
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.i_clk (i_clk),
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.i_rst (i_rst),
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.i_otk (i_otk),
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.i_otk_valid (i_otk_valid),
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.o_tag (o_tag),
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.o_tag_valid (o_tag_valid),
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.s_data_axis (s_data_axis)
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);
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endmodule
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@@ -1 +1,4 @@
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../src/sources.list
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poly1305_core_harness.sv
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../src/sources.list
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../../common/sim/sub/taxi/src/axis/rtl/taxi_axis_if.sv
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