Add poly1305 stage
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@@ -16,4 +16,10 @@ tests:
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modules:
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- "poly1305_friendly_modular_mult"
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sources: sources.list
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waves: True
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- name: "poly1305_stage"
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toplevel: "poly1305_stage"
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modules:
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- "poly1305_stage"
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sources: sources.list
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waves: True
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@@ -78,7 +78,7 @@ async def test_sanity(dut):
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await tb.cycle_reset()
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count = 1024
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count = 1
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for _ in range(count):
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await tb.write_input(random.randint(1,2**128-1), random.randint(0, 2**130-6))
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110
ChaCha20_Poly1305_64/sim/poly1305_stage.py
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110
ChaCha20_Poly1305_64/sim/poly1305_stage.py
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@@ -0,0 +1,110 @@
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import logging
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import Timer, RisingEdge, FallingEdge
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from cocotb.queue import Queue
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from cocotbext.axi import AxiStreamBus, AxiStreamSource
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from modulo_theory import friendly_modular_mult
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import random
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PRIME = 2**130-5
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CLK_PERIOD = 4
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class TB:
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def __init__(self, dut):
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self.dut = dut
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.INFO)
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self.input_queue = Queue()
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self.expected_queue = Queue()
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self.output_queue = Queue()
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cocotb.start_soon(Clock(self.dut.i_clk, CLK_PERIOD, units="ns").start())
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cocotb.start_soon(self.run_input())
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cocotb.start_soon(self.run_output())
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self.index = 0
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self.accumulators = [0, 0]
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async def cycle_reset(self):
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await self._cycle_reset(self.dut.i_rst, self.dut.i_clk)
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async def _cycle_reset(self, rst, clk):
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rst.setimmediatevalue(0)
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await RisingEdge(clk)
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await RisingEdge(clk)
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rst.value = 1
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await RisingEdge(clk)
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await RisingEdge(clk)
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rst.value = 0
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await RisingEdge(clk)
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await RisingEdge(clk)
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async def write_input(self, msg: int, r_power: int, clear_acc: int):
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await self.input_queue.put((msg, r_power, clear_acc))
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if clear_acc:
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expected_result = friendly_modular_mult((msg) % PRIME, r_power)
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else:
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expected_result = friendly_modular_mult((msg + self.accumulators[self.index]) % PRIME, r_power)
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self.accumulators[self.index] = expected_result
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await self.expected_queue.put(expected_result)
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self.index = 1 if self.index == 0 else 0
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async def run_input(self):
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while True:
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msg, r_power, clear_acc = await self.input_queue.get()
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self.dut.i_valid.value = 1
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self.dut.i_r_power.value = r_power
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self.dut.i_message.value = msg
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self.dut.i_clear_acc.value = clear_acc
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while True:
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await RisingEdge(self.dut.i_clk)
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if (self.dut.o_ready.value == 1):
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break
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self.dut.i_valid.value = 0
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self.dut.i_r_power.value = 0
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self.dut.i_message.value = 0
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self.dut.i_clear_acc.value = 0
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async def run_output(self):
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while True:
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await RisingEdge(self.dut.i_clk)
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if self.dut.o_valid.value:
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await self.output_queue.put(self.dut.o_result.value.integer)
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@cocotb.test
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async def test_sanity(dut):
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tb = TB(dut)
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await tb.cycle_reset()
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count = 1024
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for _ in range(count):
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clr = 1 if random.randint(0,10) == 0 else 0
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await tb.write_input(random.randint(1,2**128-1), random.randint(0, 2**130-6), clr)
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fail = False
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for _ in range(count):
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sim_val = await tb.expected_queue.get()
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dut_val = await tb.output_queue.get()
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if sim_val != dut_val:
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tb.log.info(f"{_} {sim_val:x} -> {dut_val:x}")
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fail = True
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assert not fail
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