101 lines
2.3 KiB
Systemverilog
101 lines
2.3 KiB
Systemverilog
module poly1305_core #(
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) (
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input i_clk,
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input i_rst,
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input [255:0] i_otk,
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input i_otk_valid,
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output [127:0] o_tag,
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output o_tag_valid,
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taxi_axis_if.snk s_data_axis
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);
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// incoming data must be 128 bit and packed, i.e. tkeep is 1 except for the last beat with no gaps
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localparam R_MASK = 128'h0ffffffc0ffffffc0ffffffc0fffffff;
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localparam P130M5 = 258'h3fffffffffffffffffffffffffffffffb;
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logic [127:0] poly1305_r, poly1305_s;
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logic [129:0] accumulator, accumulator_next;
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logic [129:0] data_one_extended;
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logic [130:0] data_post_add, data_post_add_reg;
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logic [257:0] data_post_mul, data_post_mul_reg;
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logic [257:0] modulo_stage, modulo_stage_next;
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logic [2:0] phase;
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logic [3:0] valid_sr;
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function logic [129:0] tkeep_expand (input [15:0] tkeep);
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tkeep_expand = '0;
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for (int i = 0; i < 16; i++) begin
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tkeep_expand[i*8 +: 8] = {8{tkeep[i]}};
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end
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endfunction
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// only ready in phase 0
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assign s_data_axis.tready = phase == 0;
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assign o_tag_valid = valid_sr[3];
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always_ff @(posedge i_clk) begin
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if (i_rst) begin
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phase <= '0;
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valid_sr <= '0;
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end
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valid_sr <= {valid_sr[2:0], s_data_axis.tlast & s_data_axis.tvalid & s_data_axis.tready & (phase == 0)};
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data_post_add_reg <= data_post_add;
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data_post_mul_reg <= data_post_mul;
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modulo_stage <= modulo_stage_next;
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if (i_otk_valid) begin
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poly1305_r <= i_otk[255:128] & R_MASK;
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poly1305_s <= i_otk[127:0];
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end
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if (s_data_axis.tvalid && phase == 0) begin
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phase <= 1;
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end
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if (phase == 1) begin
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phase <= 2;
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end
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if (phase == 2) begin
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phase <= 3;
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end
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if (phase == 3) begin
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accumulator <= accumulator_next;
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phase <= '0;
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end
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end
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always_comb begin
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accumulator_next = accumulator;
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data_post_mul = '0;
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// phase == 0
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data_one_extended = (tkeep_expand(s_data_axis.tkeep) + 1) | {2'b0, s_data_axis.tdata};
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data_post_add = data_one_extended + accumulator;
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// phase == 1
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data_post_mul = data_post_add_reg * poly1305_r;
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// phase == 2
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modulo_stage_next = (data_post_mul_reg[257:130] * 5) + 258'(data_post_mul_reg[129:0]);
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// phase == 3
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accumulator_next = 130'((modulo_stage[257:130] * 5) + 258'(modulo_stage[129:0]));
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end
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assign o_tag = accumulator[127:0] + poly1305_s;
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endmodule |