3 Commits

Author	SHA1	Message	Date
Jamie Iles	0f11a52582	RISC-V: use REG_S/REG_L for mcount ... In preparation for rv32i ftrace support, convert mcount routines to use native sized loads/stores. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Link: https://lore.kernel.org/r/20221115200832.706370-2-jamie@jamieiles.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>	2026-08-09 22:38:51 -07:00
Sebastien Van Cauwenberghe	8b12b26dd9	riscv: Align on L1_CACHE_BYTES when STRICT_KERNEL_RWX ... Allows the sections to be aligned on smaller boundaries and therefore results in a smaller kernel image size. Signed-off-by: Sebastien Van Cauwenberghe <svancau@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>	2026-08-09 22:38:51 -07:00
Byron Lathi	9d0aeafebd	initial commit	2026-08-09 22:38:33 -07:00