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Fix for cocotb 2
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This commit is contained in:
Byron Lathi
2025-11-22 16:12:24 -08:00
parent 6cfa6ba36a
commit d4930c909a
2 changed files with 4 additions and 4 deletions
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4
pyproject.toml
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@@ -35,7 +35,7 @@ name = "fpga-sim" # REQUIRED, is the only field that cannot be marked as dynami
# https://packaging.python.org/guides/single-sourcing-package-version/ # https://packaging.python.org/guides/single-sourcing-package-version/
# dynamic = ["version"] # dynamic = ["version"]
version = "0.4.0" # REQUIRED, although can be dynamic version = "0.5.0" # REQUIRED, although can be dynamic
# This is a one-line description or tagline of what your project does. This # This is a one-line description or tagline of what your project does. This
# corresponds to the "Summary" metadata field: # corresponds to the "Summary" metadata field:
@@ -122,7 +122,7 @@ classifiers = [
# https://packaging.python.org/discussions/install-requires-vs-requirements/ # https://packaging.python.org/discussions/install-requires-vs-requirements/
dependencies = [ dependencies = [
"pyyaml", "pyyaml",
"cocotb", "cocotb>=2",
"rtl-manifest>=0.3.1" "rtl-manifest>=0.3.1"
] ]

4
src/fpga_sim/fpga_sim.py
View File

@@ -3,7 +3,7 @@ import sys
import argparse import argparse
from cocotb.runner import get_runner from cocotb_tools.runner import get_runner
from rtl_manifest import rtl_manifest from rtl_manifest import rtl_manifest
@@ -105,7 +105,7 @@ def fpga_sim_main():
build_args.append("--trace-fst") build_args.append("--trace-fst")
runner.build( runner.build(
verilog_sources=verilog_sources, sources=verilog_sources,
includes=incdirs, includes=incdirs,
hdl_toplevel=test["toplevel"], hdl_toplevel=test["toplevel"],
build_dir=f"{test['base_path']}/sim_build", build_dir=f"{test['base_path']}/sim_build",