Fix base path issue
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@@ -32,7 +32,6 @@ def fpga_sim_main():
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# 2: Figure out which tests to run
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base_path = os.path.split(os.path.abspath(args.yaml))[0]
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print(base_path)
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tests = []
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@@ -41,11 +40,11 @@ def fpga_sim_main():
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if test["type"] == "yaml":
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with open(f"{_base_path}/{test["yaml"]}") as _cfg_file:
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__cfg = yaml.safe_load(_cfg_file)
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parse_cfg(__cfg, f"{base_path}/{os.path.split(test["yaml"])[0]}")
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parse_cfg(__cfg, f"{_base_path}/{os.path.split(test["yaml"])[0]}")
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if test["type"] == "test":
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waves = test["waves"] if "waves" in test else None
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tests.append({
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"base_path": base_path,
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"base_path": _base_path,
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"name": test["name"],
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"toplevel": test["toplevel"],
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"modules": test["modules"],
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@@ -82,7 +81,3 @@ def fpga_sim_main():
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sys.path.append(test["base_path"])
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runner.test(hdl_toplevel=test["toplevel"], test_module=test["modules"], waves=test["waves"], results_xml=result_xml)
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if __name__ == "__main__":
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main()
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