module fpga6502 (
    output		    jtagCtrl_tdi,
    input		    jtagCtrl_tdo,
    output		    jtagCtrl_enable,
    output		    jtagCtrl_capture,
    output		    jtagCtrl_shift,
    output		    jtagCtrl_update,
    output		    jtagCtrl_reset,
    input		    ut_jtagCtrl_tdi,
    output		    ut_jtagCtrl_tdo,
    input		    ut_jtagCtrl_enable,
    input		    ut_jtagCtrl_capture,
    input		    ut_jtagCtrl_shift,
    input		    ut_jtagCtrl_update,
    input		    ut_jtagCtrl_reset,
    input		    io_cfuClk,
    input		    io_cfuReset,
    input		    cpu0_customInstruction_cmd_valid,
    output		    cpu0_customInstruction_cmd_ready,
    input [9:0]     cpu0_customInstruction_function_id,
    input [31:0]    cpu0_customInstruction_inputs_0,
    input [31:0]    cpu0_customInstruction_inputs_1,
    output		    cpu0_customInstruction_rsp_valid,
    input		    cpu0_customInstruction_rsp_ready,
    output [31:0]   cpu0_customInstruction_outputs_0,
    input		    cpu1_customInstruction_cmd_valid,
    output		    cpu1_customInstruction_cmd_ready,
    input [9:0]     cpu1_customInstruction_function_id,
    input [31:0]    cpu1_customInstruction_inputs_0,
    input [31:0]    cpu1_customInstruction_inputs_1,
    output		    cpu1_customInstruction_rsp_valid,
    input		    cpu1_customInstruction_rsp_ready,
    output [31:0]   cpu1_customInstruction_outputs_0,
    input		    cpu2_customInstruction_cmd_valid,
    output		    cpu2_customInstruction_cmd_ready,
    input [9:0]     cpu2_customInstruction_function_id,
    input [31:0]    cpu2_customInstruction_inputs_0,
    input [31:0]    cpu2_customInstruction_inputs_1,
    output		    cpu2_customInstruction_rsp_valid,
    input		    cpu2_customInstruction_rsp_ready,
    output [31:0]   cpu2_customInstruction_outputs_0,
    input		    cpu3_customInstruction_cmd_valid,
    output		    cpu3_customInstruction_cmd_ready,
    input [9:0]     cpu3_customInstruction_function_id,
    input [31:0]    cpu3_customInstruction_inputs_0,
    input [31:0]    cpu3_customInstruction_inputs_1,
    output		    cpu3_customInstruction_rsp_valid,
    input		    cpu3_customInstruction_rsp_ready,
    output [31:0]   cpu3_customInstruction_outputs_0,
    output		    io_ddrMasters_0_aw_valid,
    input		    io_ddrMasters_0_aw_ready,
    output [31:0]   io_ddrMasters_0_aw_payload_addr,
    output [3:0]    io_ddrMasters_0_aw_payload_id,
    output [3:0]    io_ddrMasters_0_aw_payload_region,
    output [7:0]    io_ddrMasters_0_aw_payload_len,
    output [2:0]    io_ddrMasters_0_aw_payload_size,
    output [1:0]    io_ddrMasters_0_aw_payload_burst,
    output		    io_ddrMasters_0_aw_payload_lock,
    output [3:0]    io_ddrMasters_0_aw_payload_cache,
    output [3:0]    io_ddrMasters_0_aw_payload_qos,
    output [2:0]    io_ddrMasters_0_aw_payload_prot,
    output		    io_ddrMasters_0_aw_payload_allStrb,
    output		    io_ddrMasters_0_w_valid,
    input		    io_ddrMasters_0_w_ready,
    output [127:0]  io_ddrMasters_0_w_payload_data,
    output [15:0]   io_ddrMasters_0_w_payload_strb,
    output		    io_ddrMasters_0_w_payload_last,
    input		    io_ddrMasters_0_b_valid,
    output		    io_ddrMasters_0_b_ready,
    input [3:0]     io_ddrMasters_0_b_payload_id,
    input [1:0]     io_ddrMasters_0_b_payload_resp,
    output		    io_ddrMasters_0_ar_valid,
    input		    io_ddrMasters_0_ar_ready,
    output [31:0]   io_ddrMasters_0_ar_payload_addr,
    output [3:0]    io_ddrMasters_0_ar_payload_id,
    output [3:0]    io_ddrMasters_0_ar_payload_region,
    output [7:0]    io_ddrMasters_0_ar_payload_len,
    output [2:0]    io_ddrMasters_0_ar_payload_size,
    output [1:0]    io_ddrMasters_0_ar_payload_burst,
    output		    io_ddrMasters_0_ar_payload_lock,
    output [3:0]    io_ddrMasters_0_ar_payload_cache,
    output [3:0]    io_ddrMasters_0_ar_payload_qos,
    output [2:0]    io_ddrMasters_0_ar_payload_prot,
    input		    io_ddrMasters_0_r_valid,
    output		    io_ddrMasters_0_r_ready,
    input [127:0]   io_ddrMasters_0_r_payload_data,
    input [3:0]     io_ddrMasters_0_r_payload_id,
    input [1:0]     io_ddrMasters_0_r_payload_resp,
    input		    io_ddrMasters_0_r_payload_last,
    input		    io_ddrMasters_0_clk,
    input		    io_ddrMasters_0_reset,
    output          io_ddrMasters_memCheck_pass,
    output		    userInterruptA,
    output		    userInterruptB,
    output		    userInterruptC,
    output		    userInterruptD,
    output		    userInterruptE,
    output		    userInterruptF,
    output		    userInterruptH,
    output		    userInterruptG,
    output          userInterruptI,
    input [3:0]     system_gpio_0_io_read,
    output [3:0]    system_gpio_0_io_write,
    output [3:0]    system_gpio_0_io_writeEnable,
    output		    system_uart_0_io_txd,
    input		    system_uart_0_io_rxd,
    output		    system_spi_0_io_sclk_write,
    output		    system_spi_0_io_data_0_writeEnable,
    input		    system_spi_0_io_data_0_read,
    output		    system_spi_0_io_data_0_write,
    output		    system_spi_0_io_data_1_writeEnable,
    input		    system_spi_0_io_data_1_read,
    output		    system_spi_0_io_data_1_write,
    output		    system_spi_0_io_data_2_writeEnable,
    input		    system_spi_0_io_data_2_read,
    output		    system_spi_0_io_data_2_write,
    output		    system_spi_0_io_data_3_writeEnable,
    input		    system_spi_0_io_data_3_read,
    output		    system_spi_0_io_data_3_write,
    output [3:0]    system_spi_0_io_ss,
    output		    system_i2c_0_io_sda_writeEnable,
    output		    system_i2c_0_io_sda_write,
    input		    system_i2c_0_io_sda_read,
    output		    system_i2c_0_io_scl_writeEnable,
    output		    system_i2c_0_io_scl_write,
    input		    system_i2c_0_io_scl_read,
    input [31:0]    axiA_awaddr,
    input [7:0]	    axiA_awlen,
    input [2:0]	    axiA_awsize,
    input [1:0]	    axiA_awburst,
    input		    axiA_awlock,
    input [3:0]	    axiA_awcache,
    input [2:0]	    axiA_awprot,
    input [3:0]	    axiA_awqos,
    input [3:0]	    axiA_awregion,
    input		    axiA_awvalid,
    output		    axiA_awready,
    input [31:0]    axiA_wdata,
    input [3:0]     axiA_wstrb,
    input		    axiA_wvalid,
    input		    axiA_wlast,
    output		    axiA_wready,
    output [1:0]    axiA_bresp,
    output		    axiA_bvalid,
    input		    axiA_bready,
    input [31:0]    axiA_araddr,
    input [7:0]	    axiA_arlen,
    input [2:0]	    axiA_arsize,
    input [1:0]	    axiA_arburst,
    input		    axiA_arlock,
    input [3:0]	    axiA_arcache,
    input [2:0]	    axiA_arprot,
    input [3:0]	    axiA_arqos,
    input [3:0]	    axiA_arregion,
    input		    axiA_arvalid,
    output		    axiA_arready,
    output [31:0]   axiA_rdata,
    output [1:0]    axiA_rresp,
    output		    axiA_rlast,
    output		    axiA_rvalid,
    input		    axiA_rready,
    output          axiAInterrupt,
    input           cfg_done,
    output          cfg_start,
    output          cfg_sel,
    output          cfg_reset,
    input		    io_peripheralClk,
    input           io_peripheralReset,
    output          io_asyncReset,
    input           io_gpio_sw_n, 
    input           pll_peripheral_locked,
    input           pll_system_locked,
    input           pll_tse_locked,
    //  SDHC
    input           sd_base_clk, 
    output          sd_clk_hi,
    output          sd_clk_lo,
    input           sd_cmd_i,
    output          sd_cmd_o,
    output          sd_cmd_oe,
    input  [3:0]    sd_dat_i,
    output [3:0]    sd_dat_o,
    output [3:0]    sd_dat_oe,
    input           sd_cd_n, 
    input           sd_wp,
    // TSEMAC
    input           io_tseClk,
    // MAC 
    output [3:0]    rgmii_txd_HI,
    output [3:0]    rgmii_txd_LO,
    output          rgmii_tx_ctl_HI,
    output          rgmii_tx_ctl_LO,
    output          rgmii_txc_HI,
    output          rgmii_txc_LO,
    input  [3:0]    rgmii_rxd_HI,
    input  [3:0]    rgmii_rxd_LO,
    input           rgmii_rx_ctl_HI,
    input           rgmii_rx_ctl_LO,
    input           mux_clk,
    output [1:0]    mux_clk_sw,
    // PHY
    output          phy_rst,
    input           phy_mdi,
    output          phy_mdo,
    output          phy_mdo_en,
    output          phy_mdc,
    input           rgmii_rxc,      
    input           rgmii_rxc_slow
);



top_soc u_top_soc (
    .jtagCtrl_tdi       (jtagCtrl_tdi),
    .jtagCtrl_tdo    (jtagCtrl_tdo),
    .jtagCtrl_enable (jtagCtrl_enable),
    .jtagCtrl_capture    (jtagCtrl_capture),
    .jtagCtrl_shift  (jtagCtrl_shift),
    .jtagCtrl_update (jtagCtrl_update),
    .jtagCtrl_reset  (jtagCtrl_reset),
    .ut_jtagCtrl_tdi (ut_jtagCtrl_tdi),
    .ut_jtagCtrl_tdo (ut_jtagCtrl_tdo),
    .ut_jtagCtrl_enable  (ut_jtagCtrl_enable),
    .ut_jtagCtrl_capture (ut_jtagCtrl_capture),
    .ut_jtagCtrl_shift   (ut_jtagCtrl_shift),
    .ut_jtagCtrl_update  (ut_jtagCtrl_update),
    .ut_jtagCtrl_reset   (ut_jtagCtrl_reset),
    .io_cfuClk   (io_cfuClk),
    .io_cfuReset (io_cfuReset),
    .io_ddrMasters_0_aw_valid           (io_ddrMasters_0_aw_valid),
    .io_ddrMasters_0_aw_ready           (io_ddrMasters_0_aw_ready),
    .io_ddrMasters_0_aw_payload_addr    (io_ddrMasters_0_aw_payload_addr),
    .io_ddrMasters_0_aw_payload_id      (io_ddrMasters_0_aw_payload_id),
    .io_ddrMasters_0_aw_payload_region  (io_ddrMasters_0_aw_payload_region),
    .io_ddrMasters_0_aw_payload_len     (io_ddrMasters_0_aw_payload_len),
    .io_ddrMasters_0_aw_payload_size    (io_ddrMasters_0_aw_payload_size),
    .io_ddrMasters_0_aw_payload_burst   (io_ddrMasters_0_aw_payload_burst),
    .io_ddrMasters_0_aw_payload_lock    (io_ddrMasters_0_aw_payload_lock),
    .io_ddrMasters_0_aw_payload_cache   (io_ddrMasters_0_aw_payload_cache),
    .io_ddrMasters_0_aw_payload_qos     (io_ddrMasters_0_aw_payload_qos),
    .io_ddrMasters_0_aw_payload_prot    (io_ddrMasters_0_aw_payload_prot),
    .io_ddrMasters_0_aw_payload_allStrb (io_ddrMasters_0_aw_payload_allStrb),
    .io_ddrMasters_0_w_valid            (io_ddrMasters_0_w_valid),
    .io_ddrMasters_0_w_ready            (io_ddrMasters_0_w_ready),
    .io_ddrMasters_0_w_payload_data     (io_ddrMasters_0_w_payload_data),
    .io_ddrMasters_0_w_payload_strb     (io_ddrMasters_0_w_payload_strb),
    .io_ddrMasters_0_w_payload_last     (io_ddrMasters_0_w_payload_last),
    .io_ddrMasters_0_b_valid            (io_ddrMasters_0_b_valid),
    .io_ddrMasters_0_b_ready            (io_ddrMasters_0_b_ready),
    .io_ddrMasters_0_b_payload_id       (io_ddrMasters_0_b_payload_id),
    .io_ddrMasters_0_b_payload_resp     (io_ddrMasters_0_b_payload_resp),
    .io_ddrMasters_0_ar_valid           (io_ddrMasters_0_ar_valid),
    .io_ddrMasters_0_ar_ready           (io_ddrMasters_0_ar_ready),
    .io_ddrMasters_0_ar_payload_addr    (io_ddrMasters_0_ar_payload_addr),
    .io_ddrMasters_0_ar_payload_id      (io_ddrMasters_0_ar_payload_id),
    .io_ddrMasters_0_ar_payload_region  (io_ddrMasters_0_ar_payload_region),
    .io_ddrMasters_0_ar_payload_len     (io_ddrMasters_0_ar_payload_len),
    .io_ddrMasters_0_ar_payload_size    (io_ddrMasters_0_ar_payload_size),
    .io_ddrMasters_0_ar_payload_burst   (io_ddrMasters_0_ar_payload_burst),
    .io_ddrMasters_0_ar_payload_lock    (io_ddrMasters_0_ar_payload_lock),
    .io_ddrMasters_0_ar_payload_cache   (io_ddrMasters_0_ar_payload_cache),
    .io_ddrMasters_0_ar_payload_qos     (io_ddrMasters_0_ar_payload_qos),
    .io_ddrMasters_0_ar_payload_prot    (io_ddrMasters_0_ar_payload_prot),
    .io_ddrMasters_0_r_valid            (io_ddrMasters_0_r_valid),
    .io_ddrMasters_0_r_ready            (io_ddrMasters_0_r_ready),
    .io_ddrMasters_0_r_payload_data     (io_ddrMasters_0_r_payload_data),
    .io_ddrMasters_0_r_payload_id       (io_ddrMasters_0_r_payload_id),
    .io_ddrMasters_0_r_payload_resp     (io_ddrMasters_0_r_payload_resp),
    .io_ddrMasters_0_r_payload_last     (io_ddrMasters_0_r_payload_last),
    .io_ddrMasters_0_clk                (io_ddrMasters_0_clk),
    .io_ddrMasters_0_reset              (io_ddrMasters_0_reset),
    .io_ddrMasters_memCheck_pass        (io_ddrMasters_memCheck_pass),
    .userInterruptA                     (userInterruptA),
    .userInterruptB                     (userInterruptB),
    .userInterruptC                     (userInterruptC),
    .userInterruptD                     (userInterruptD),
    .userInterruptE                     (userInterruptE),
    .userInterruptF                     (userInterruptF),
    .userInterruptH                     (userInterruptH),
    .userInterruptG                     (userInterruptG),
    .userInterruptI                     (userInterruptI),
    .system_gpio_0_io_read              (system_gpio_0_io_read),
    .system_gpio_0_io_write             (system_gpio_0_io_write),
    .system_gpio_0_io_writeEnable       (system_gpio_0_io_writeEnable),
    .system_uart_0_io_txd               (system_uart_0_io_txd),
    .system_uart_0_io_rxd               (system_uart_0_io_rxd),
    .system_spi_0_io_sclk_write         (system_spi_0_io_sclk_write),
    .system_spi_0_io_data_0_writeEnable (system_spi_0_io_data_0_writeEnable),
    .system_spi_0_io_data_0_read        (system_spi_0_io_data_0_read),
    .system_spi_0_io_data_0_write       (system_spi_0_io_data_0_write),
    .system_spi_0_io_data_1_writeEnable (system_spi_0_io_data_1_writeEnable),
    .system_spi_0_io_data_1_read        (system_spi_0_io_data_1_read),
    .system_spi_0_io_data_1_write       (system_spi_0_io_data_1_write),
    .system_spi_0_io_data_2_writeEnable (system_spi_0_io_data_2_writeEnable),
    .system_spi_0_io_data_2_read        (system_spi_0_io_data_2_read),
    .system_spi_0_io_data_2_write       (system_spi_0_io_data_2_write),
    .system_spi_0_io_data_3_writeEnable (system_spi_0_io_data_3_writeEnable),
    .system_spi_0_io_data_3_read        (system_spi_0_io_data_3_read),
    .system_spi_0_io_data_3_write       (system_spi_0_io_data_3_write),
    .system_spi_0_io_ss                 (system_spi_0_io_ss),
    .system_i2c_0_io_sda_writeEnable    (system_i2c_0_io_sda_writeEnable),
    .system_i2c_0_io_sda_write          (system_i2c_0_io_sda_write),
    .system_i2c_0_io_sda_read           (system_i2c_0_io_sda_read),
    .system_i2c_0_io_scl_writeEnable    (system_i2c_0_io_scl_writeEnable),
    .system_i2c_0_io_scl_write          (system_i2c_0_io_scl_write),
    .system_i2c_0_io_scl_read           (system_i2c_0_io_scl_read),
    .axiA_awaddr                        (axiA_awaddr),
    .axiA_awlen                         (axiA_awlen),
    .axiA_awsize                        (axiA_awsize),
    .axiA_awburst                       (axiA_awburst),
    .axiA_awlock                        (axiA_awlock),
    .axiA_awcache                       (axiA_awcache),
    .axiA_awprot                        (axiA_awprot),
    .axiA_awqos                         (axiA_awqos),
    .axiA_awregion                      (axiA_awregion),
    .axiA_awvalid                       (axiA_awvalid),
    .axiA_awready                       (axiA_awready),
    .axiA_wdata                         (axiA_wdata),
    .axiA_wstrb                         (axiA_wstrb),
    .axiA_wvalid                        (axiA_wvalid),
    .axiA_wlast                         (axiA_wlast),
    .axiA_wready                        (axiA_wready),
    .axiA_bresp                         (axiA_bresp),
    .axiA_bvalid                        (axiA_bvalid),
    .axiA_bready                        (axiA_bready),
    .axiA_araddr                        (axiA_araddr),
    .axiA_arlen                         (axiA_arlen),
    .axiA_arsize                        (axiA_arsize),
    .axiA_arburst                       (axiA_arburst),
    .axiA_arlock                        (axiA_arlock),
    .axiA_arcache                       (axiA_arcache),
    .axiA_arprot                        (axiA_arprot),
    .axiA_arqos                         (axiA_arqos),
    .axiA_arregion                      (axiA_arregion),
    .axiA_arvalid                       (axiA_arvalid),
    .axiA_arready                       (axiA_arready),
    .axiA_rdata                         (axiA_rdata),
    .axiA_rresp                         (axiA_rresp),
    .axiA_rlast                         (axiA_rlast),
    .axiA_rvalid                        (axiA_rvalid),
    .axiA_rready                        (axiA_rready),
    .axiAInterrupt                      (axiAInterrupt),
    .cfg_done                           (cfg_done),
    .cfg_start                          (cfg_start),
    .cfg_sel                            (cfg_sel),
    .cfg_reset                          (cfg_reset),
    .io_peripheralClk                   (io_peripheralClk),
    .io_peripheralReset                 (io_peripheralReset),
    .io_asyncReset                      (io_asyncReset),
    .io_gpio_sw_n                       (io_gpio_sw_n),
    .pll_peripheral_locked              (pll_peripheral_locked),
    .pll_system_locked                  (pll_system_locked),
    .pll_tse_locked                     (pll_tse_locked),
    .sd_base_clk                        (sd_base_clk), 
    .sd_clk_hi                          (sd_clk_hi),
    .sd_clk_lo                          (sd_clk_lo),
    .sd_cmd_i                           (sd_cmd_i),
    .sd_cmd_o                           (sd_cmd_o),
    .sd_cmd_oe                          (sd_cmd_oe),
    .sd_dat_i                           (sd_dat_i),
    .sd_dat_o                           (sd_dat_o),
    .sd_dat_oe                          (sd_dat_oe),
    .sd_cd_n                            (sd_cd_n), 
    .sd_wp                              (sd_wp),
    .io_tseClk                          (io_tseClk),
    .rgmii_txd_HI                       (rgmii_txd_HI),
    .rgmii_txd_LO                       (rgmii_txd_LO),
    .rgmii_tx_ctl_HI                    (rgmii_tx_ctl_HI),
    .rgmii_tx_ctl_LO                    (rgmii_tx_ctl_LO),
    .rgmii_txc_HI                       (rgmii_txc_HI),
    .rgmii_txc_LO                       (rgmii_txc_LO),
    .rgmii_rxd_HI                       (rgmii_rxd_HI),
    .rgmii_rxd_LO                       (rgmii_rxd_LO),
    .rgmii_rx_ctl_HI                    (rgmii_rx_ctl_HI),
    .rgmii_rx_ctl_LO                    (rgmii_rx_ctl_LO),
    .mux_clk                            (mux_clk),
    .mux_clk_sw                         (mux_clk_sw),
    .phy_rst                            (phy_rst),
    .phy_mdi                            (phy_mdi),
    .phy_mdo                            (phy_mdo),
    .phy_mdo_en                         (phy_mdo_en),
    .phy_mdc                            (phy_mdc),
    .rgmii_rxc                          (rgmii_rxc),
    .rgmii_rxc_slow                     (rgmii_rxc_slow)
);

endmodule