<?xml version="1.0" encoding="UTF-8"?>
<efxpt:design_db name="temac_ex" device_def="Ti60F225" version="2025.M.207" db_version="20252006" last_change_date="Mon Aug 11 14:27:23 2025" xmlns:efxpt="http://www.efinixinc.com/peri_design_db" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/peri_design_db peri_design_db.xsd ">
    <efxpt:device_info>
        <efxpt:iobank_info>
            <efxpt:iobank name="1A" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="1A_MODE_SEL"/>
            <efxpt:iobank name="1B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="1B_MODE_SEL"/>
            <efxpt:iobank name="2A" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2A_MODE_SEL"/>
            <efxpt:iobank name="2B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2B_MODE_SEL"/>
            <efxpt:iobank name="3A" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="3A_MODE_SEL"/>
            <efxpt:iobank name="3B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="3B_MODE_SEL"/>
            <efxpt:iobank name="4A" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="4A_MODE_SEL"/>
            <efxpt:iobank name="4B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="4B_MODE_SEL"/>
            <efxpt:iobank name="BL" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="BL_MODE_SEL"/>
            <efxpt:iobank name="BR" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="BR_MODE_SEL"/>
            <efxpt:iobank name="TL" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TL_MODE_SEL"/>
            <efxpt:iobank name="TR" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TR_MODE_SEL"/>
        </efxpt:iobank_info>
        <efxpt:ctrl_info>
            <efxpt:ctrl name="cfg" ctrl_def="CONFIG_CTRL0" clock_name="" is_clk_invert="false" cbsel_bus_name="cfg_CBSEL" config_ctrl_name="cfg_CONFIG" ena_capture_name="cfg_ENA" error_status_name="cfg_ERROR" um_signal_status_name="cfg_USR_STATUS" is_remote_update_enable="false" is_user_mode_enable="false"/>
        </efxpt:ctrl_info>
        <efxpt:seu_info>
            <efxpt:seu name="seu" block_def="CONFIG_SEU0" mode="auto" ena_detect="false" wait_interval="16500000">
                <efxpt:gen_pin>
                    <efxpt:pin name="seu_START" type_name="START" is_bus="false"/>
                    <efxpt:pin name="seu_INJECT_ERROR" type_name="INJECT_ERROR" is_bus="false"/>
                    <efxpt:pin name="seu_RST" type_name="RST" is_bus="false"/>
                    <efxpt:pin name="seu_CONFIG" type_name="CONFIG" is_bus="false"/>
                    <efxpt:pin name="seu_ERROR" type_name="ERROR" is_bus="false"/>
                    <efxpt:pin name="seu_DONE" type_name="DONE" is_bus="false"/>
                </efxpt:gen_pin>
            </efxpt:seu>
        </efxpt:seu_info>
        <efxpt:clkmux_info>
            <efxpt:clkmux name="CLKMUX_B" block_def="CLKMUX_B" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
                <efxpt:gen_pin>
                    <efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
                </efxpt:gen_pin>
            </efxpt:clkmux>
            <efxpt:clkmux name="CLKMUX_L" block_def="CLKMUX_L" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
                <efxpt:gen_pin>
                    <efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
                </efxpt:gen_pin>
            </efxpt:clkmux>
            <efxpt:clkmux name="CLKMUX_R" block_def="CLKMUX_R" is_mux_bot0_dyn="true" is_mux_bot7_dyn="false">
                <efxpt:gen_pin>
                    <efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="mux_clk" type_name="DYN_MUX_OUT_0" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
                    <efxpt:pin name="mux_clk_sw" type_name="DYN_MUX_SEL_0" is_bus="true"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
                </efxpt:gen_pin>
                <efxpt:dyn_mux0_inputs>
                    <efxpt:dyn_input index="0" resource="GPIOR_PN_11" resource_pin="DOUT_EVENP" is_static="true"/>
                    <efxpt:dyn_input index="3" resource="PLL_TR0" resource_pin="CLKOUT0" is_static="true"/>
                </efxpt:dyn_mux0_inputs>
            </efxpt:clkmux>
            <efxpt:clkmux name="CLKMUX_T" block_def="CLKMUX_T" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
                <efxpt:gen_pin>
                    <efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
                    <efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
                </efxpt:gen_pin>
            </efxpt:clkmux>
        </efxpt:clkmux_info>
    </efxpt:device_info>
    <efxpt:gpio_info>
        <efxpt:comp_gpio name="clk_50m_ext" gpio_def="GPIOL_P_18" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="clk_50m_ext" name_ddio_lo="" conn_type="pll_clkin" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="clk_50m_ext_PULL_UP_ENA" dyn_delay_en_name="clk_50m_ext_DLY_ENA" dyn_delay_reset_name="clk_50m_ext_DLY_RST" dyn_delay_ctrl_name="clk_50m_ext_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="phy_mdc" gpio_def="GPIOL_N_05" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="phy_mdc" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="phy_mdio" gpio_def="GPIOL_P_05" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="phy_mdi" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="phy_mdio_PULL_UP_ENA" dyn_delay_en_name="phy_mdio_DLY_ENA" dyn_delay_reset_name="phy_mdio_DLY_RST" dyn_delay_ctrl_name="phy_mdio_DLY_CTRL" clkmux_buf_name=""/>
            <efxpt:output_config name="phy_mdo" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
            <efxpt:output_enable_config name="phy_mdo_en" is_register="false" clock_name="" is_clock_inverted="false" name_oen="phy_mdio_OEN"/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="phy_rstn" gpio_def="GPIOL_10" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="phy_rstn" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rx_ctl" gpio_def="GPIOR_N_18" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rx_ctl_HI" name_ddio_lo="rgmii_rx_ctl_LO" conn_type="normal" is_register="true" clock_name="mux_clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="pipeline" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rx_ctl_PULL_UP_ENA" dyn_delay_en_name="rgmii_rx_ctl_DLY_ENA" dyn_delay_reset_name="rgmii_rx_ctl_DLY_RST" dyn_delay_ctrl_name="rgmii_rx_ctl_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxc_phy" gpio_def="GPIOR_P_19" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxc_phy" name_ddio_lo="" conn_type="pll_clkin" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxc_phy_PULL_UP_ENA" dyn_delay_en_name="rgmii_rxc_phy_DLY_ENA" dyn_delay_reset_name="rgmii_rxc_phy_DLY_RST" dyn_delay_ctrl_name="rgmii_rxc_phy_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxc_slow" gpio_def="GPIOR_P_11" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxc_slow" name_ddio_lo="" conn_type="gclk" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxc_slow_PULL_UP_ENA" dyn_delay_en_name="rgmii_rxc_slow_DLY_ENA" dyn_delay_reset_name="rgmii_rxc_slow_DLY_RST" dyn_delay_ctrl_name="rgmii_rxc_slow_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxd[0]" gpio_def="GPIOR_N_17" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxd_LO[0]" name_ddio_lo="rgmii_rxd_HI[0]" conn_type="normal" is_register="true" clock_name="mux_clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="pipeline" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[0]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[0]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[0]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[0]" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxd[1]" gpio_def="GPIOR_P_17" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxd_LO[1]" name_ddio_lo="rgmii_rxd_HI[1]" conn_type="normal" is_register="true" clock_name="mux_clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="pipeline" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[1]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[1]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[1]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[1]" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxd[2]" gpio_def="GPIOR_N_16" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxd_LO[2]" name_ddio_lo="rgmii_rxd_HI[2]" conn_type="normal" is_register="true" clock_name="mux_clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="pipeline" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[2]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[2]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[2]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[2]" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_rxd[3]" gpio_def="GPIOR_P_16" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="rgmii_rxd_LO[3]" name_ddio_lo="rgmii_rxd_HI[3]" conn_type="normal" is_register="true" clock_name="mux_clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="pipeline" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[3]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[3]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[3]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[3]" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_tx_ctl" gpio_def="GPIOR_P_13" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_tx_ctl_HI" name_ddio_lo="rgmii_tx_ctl_LO" register_option="register" clock_name="clk_125m" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_txc" gpio_def="GPIOR_P_14" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_txc_HI" name_ddio_lo="rgmii_txc_LO" register_option="register" clock_name="clk_125m_90deg" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_txd[0]" gpio_def="GPIOR_N_10" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_txd_HI[0]" name_ddio_lo="rgmii_txd_LO[0]" register_option="register" clock_name="clk_125m" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_txd[1]" gpio_def="GPIOR_P_10" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_txd_HI[1]" name_ddio_lo="rgmii_txd_LO[1]" register_option="register" clock_name="clk_125m" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_txd[2]" gpio_def="GPIOR_N_12" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_txd_HI[2]" name_ddio_lo="rgmii_txd_LO[2]" register_option="register" clock_name="clk_125m" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="rgmii_txd[3]" gpio_def="GPIOR_P_12" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="rgmii_txd_HI[3]" name_ddio_lo="rgmii_txd_LO[3]" register_option="register" clock_name="clk_125m" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="sw6" gpio_def="GPIOR_P_06" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="sw6" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="weak pullup" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sw6_PULL_UP_ENA" dyn_delay_en_name="sw6_DLY_ENA" dyn_delay_reset_name="sw6_DLY_RST" dyn_delay_ctrl_name="sw6_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_spi_0_io_data_0" gpio_def="GPIOL_P_03" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="system_spi_0_io_data_0_read" name_ddio_lo="" conn_type="normal" is_register="true" clock_name="clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_spi_0_io_data_0_PULL_UP_ENA" dyn_delay_en_name="system_spi_0_io_data_0_DLY_ENA" dyn_delay_reset_name="system_spi_0_io_data_0_DLY_RST" dyn_delay_ctrl_name="system_spi_0_io_data_0_DLY_CTRL" clkmux_buf_name=""/>
            <efxpt:output_config name="system_spi_0_io_data_0_write" name_ddio_lo="" register_option="register" clock_name="clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
            <efxpt:output_enable_config name="system_spi_0_io_data_0_writeEnable" is_register="false" clock_name="clk" is_clock_inverted="false" name_oen="system_spi_0_io_data_0_OEN"/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_spi_0_io_data_1" gpio_def="GPIOL_N_03" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:input_config name="system_spi_0_io_data_1_read" name_ddio_lo="" conn_type="normal" is_register="true" clock_name="clk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_spi_0_io_data_1_PULL_UP_ENA" dyn_delay_en_name="system_spi_0_io_data_1_DLY_ENA" dyn_delay_reset_name="system_spi_0_io_data_1_DLY_RST" dyn_delay_ctrl_name="system_spi_0_io_data_1_DLY_CTRL" clkmux_buf_name=""/>
            <efxpt:output_config name="system_spi_0_io_data_1_write" name_ddio_lo="" register_option="register" clock_name="clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
            <efxpt:output_enable_config name="system_spi_0_io_data_1_writeEnable" is_register="true" clock_name="clk" is_clock_inverted="false" name_oen="system_spi_0_io_data_1_OEN"/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_spi_0_io_sclk_write" gpio_def="GPIOL_N_01" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="system_spi_0_io_sclk_write" name_ddio_lo="" register_option="register" clock_name="clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_spi_0_io_ss" gpio_def="GPIOL_P_01" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
            <efxpt:output_config name="system_spi_0_io_ss" name_ddio_lo="" register_option="register" clock_name="clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_uart_0_io_rxd" gpio_def="GPIOL_01" mode="input" bus_name="" io_standard="3.3 V LVCMOS">
            <efxpt:input_config name="system_uart_0_io_rxd" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_uart_0_io_rxd_PULL_UP_ENA" dyn_delay_en_name="system_uart_0_io_rxd_DLY_ENA" dyn_delay_reset_name="system_uart_0_io_rxd_DLY_RST" dyn_delay_ctrl_name="system_uart_0_io_rxd_DLY_CTRL" clkmux_buf_name=""/>
        </efxpt:comp_gpio>
        <efxpt:comp_gpio name="system_uart_0_io_txd" gpio_def="GPIOL_02" mode="output" bus_name="" io_standard="3.3 V LVCMOS">
            <efxpt:output_config name="system_uart_0_io_txd" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
        </efxpt:comp_gpio>
        <efxpt:global_unused_config state="input with weak pullup"/>
        <efxpt:bus name="rgmii_txd" mode="output" msb="3" lsb="0"/>
        <efxpt:bus name="rgmii_rxd" mode="input" msb="3" lsb="0"/>
    </efxpt:gpio_info>
    <efxpt:pll_info>
        <efxpt:pll name="pll_0" pll_def="PLL_TL0" ref_clock_name="" ref_clock_freq="25.0000" multiplier="2" pre_divider="1" post_divider="4" reset_name="pll_rstn" locked_name="pll_0_locked" is_ipfrz="false" is_bypass_lock="true">
            <efxpt:adv_prop ref_clock_mode="external" ref_clock1_name="" ext_ref_clock_id="2" clksel_name="" feedback_clock_name="pll_0_CLKOUT3" feedback_mode="core"/>
            <efxpt:gen_pin>
                <efxpt:pin name="" type_name="SHIFT_ENA" is_bus="false"/>
                <efxpt:pin name="" type_name="DESKEWED" is_bus="false"/>
                <efxpt:pin name="" type_name="SHIFT" is_bus="true"/>
                <efxpt:pin name="" type_name="SHIFT_SEL" is_bus="true"/>
            </efxpt:gen_pin>
            <efxpt:comp_output_clock name="clk" number="0" out_divider="25" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_output_clock name="clk_125m" number="1" out_divider="10" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_output_clock name="clk_125m_90deg" number="2" out_divider="10" is_dyn_phase="false" phase_setting="5" is_inverted="false" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_output_clock name="pll_0_CLKOUT3" number="3" out_divider="25" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_prop/>
        </efxpt:pll>
        <efxpt:pll name="pll_inst2" pll_def="PLL_TR0" ref_clock_name="" ref_clock_freq="125.0000" multiplier="1" pre_divider="1" post_divider="2" reset_name="" locked_name="" is_ipfrz="false" is_bypass_lock="true">
            <efxpt:adv_prop ref_clock_mode="external" ref_clock1_name="" ext_ref_clock_id="2" clksel_name="" feedback_clock_name="rgmii_rxc_dum" feedback_mode="core"/>
            <efxpt:gen_pin>
                <efxpt:pin name="" type_name="SHIFT_ENA" is_bus="false"/>
                <efxpt:pin name="" type_name="DESKEWED" is_bus="false"/>
                <efxpt:pin name="" type_name="SHIFT" is_bus="true"/>
                <efxpt:pin name="" type_name="SHIFT_SEL" is_bus="true"/>
            </efxpt:gen_pin>
            <efxpt:comp_output_clock name="rgmii_rxc" number="0" out_divider="22" is_dyn_phase="false" phase_setting="0" is_inverted="true" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_output_clock name="rgmii_rxc_dum" number="1" out_divider="22" is_dyn_phase="false" phase_setting="0" is_inverted="true" conn_type="gclk">
                <efxpt:gen_pin/>
            </efxpt:comp_output_clock>
            <efxpt:comp_prop/>
        </efxpt:pll>
    </efxpt:pll_info>
    <efxpt:osc_info/>
    <efxpt:lvds_info/>
    <efxpt:jtag_info>
        <efxpt:jtag name="jtag_inst1" jtag_def="JTAG_USER1">
            <efxpt:gen_pin>
                <efxpt:pin name="jtag_inst1_CAPTURE" type_name="CAPTURE" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_DRCK" type_name="DRCK" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_RESET" type_name="RESET" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_RUNTEST" type_name="RUNTEST" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_SEL" type_name="SEL" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_SHIFT" type_name="SHIFT" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_TCK" type_name="TCK" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_TDI" type_name="TDI" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_TMS" type_name="TMS" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_UPDATE" type_name="UPDATE" is_bus="false"/>
                <efxpt:pin name="jtag_inst1_TDO" type_name="TDO" is_bus="false"/>
            </efxpt:gen_pin>
        </efxpt:jtag>
    </efxpt:jtag_info>
    <efxpt:mipi_dphy_info/>
</efxpt:design_db>
