fileset source_user file ../source/top_peripheralsNoGen.v is_present

fileset source file ${IP_OUTPUT_PATH}/${IP_GEN_MODULE}/source/Axi4PeripheralTop.v is_present

fileset Peripheral_Post_Script file ../generator/post_script.py is_present

fileset Peripheral_Post_Script file ../generator/wrapper_script.py is_present

(${INTF_CI_0}==1'b1 || ${INTF_CI_1}==1'b1 || ${INTF_CI_2}==1'b1 || ${INTF_CI_3}==1'b1) && ${PLL_RES_ASSIGN}==1'b1

${PLL_RES_ASSIGN_2}==1'b1 && (${INTF_CI_0} == 1'b1 || ${INTF_CI_1} == 1'b1 || ${INTF_CI_2} == 1'b1 || ${INTF_CI_3} == 1'b1)

(${PACKAGE_TYPE} == "484" || ${PACKAGE_TYPE} == "529" ) && ${PLL_SOC_MEM_RESOURCE} == "PLL_BR2"

(${PACKAGE_TYPE} == "484" || ${PACKAGE_TYPE} == "676" ) && ${PLL_SOC_MEM_RESOURCE} == "PLL_TR1"

${SW_FRTOS_APP_SIZE} < 99999999 && ${SW_FRTOS_STACK_SIZE} < 99999999

${SW_FRTOS_APP_SIZE} == 99999999 && ${SW_FRTOS_STACK_SIZE} < 99999999

${SW_FRTOS_APP_SIZE} < 99999999 && ${SW_FRTOS_STACK_SIZE} == 99999999

${SW_FRTOS_APP_SIZE} == 99999999 && ${SW_FRTOS_STACK_SIZE} == 99999999