diff --git a/hw/fpga/sd_controller.sv b/hw/fpga/sd_controller.sv
index b166f181c80d83e71fad6d2d63fda6042d954857..b8f864f16f56a6193bbc118dfc449fee18171589 100644
--- a/hw/fpga/sd_controller.sv
+++ b/hw/fpga/sd_controller.sv
@@ -84,12 +84,12 @@ always_ff @(posedge clk) begin
         if (addr < 4'h4) begin
             arg[8 * addr +: 8] <= data;
         end else if (addr == 4'h4) begin
-            cmd <= data;
+            cmd <= data[6:0];
         end
     end
 
     if (cs & addr == 4'h5 && sd_clk) begin
-        data_count <= data_count + 1;
+        data_count <= data_count + 9'b1;
     end
 
     if (state.macro == RXCMD) begin
@@ -183,7 +183,7 @@ always_comb begin
                 if (state.d_bit_count == 8'h0) begin
                     next_state.count = state.count + 9'b1;
                 end
-                next_state.d_bit_count = state.d_bit_count - 8'h1;
+                next_state.d_bit_count = state.d_bit_count - 3'h1;
             end else begin
                 next_data_flag = '1;
                 next_state.macro = RXDCRC;
@@ -199,6 +199,11 @@ always_comb begin
                 next_state.count = '0;
             end
         end
+
+        default: begin
+                next_state.macro = IDLE;
+                next_state.count = '0;
+        end
     endcase
 end
 
@@ -220,6 +225,8 @@ always_comb begin
         end
 
         RXCMD:;
+
+        default:;
     endcase
 end
 
diff --git a/hw/fpga/super6502.sv b/hw/fpga/super6502.sv
index 54bbdfe1b434c56a5c51a7f8c591ce4f4fa4a61f..6cb2502f4fb39e53abed2f9f33f30cf417e750bb 100644
--- a/hw/fpga/super6502.sv
+++ b/hw/fpga/super6502.sv
@@ -29,7 +29,7 @@ module super6502(
     input                   [7:0] SW,
     output  logic           [7:0] LED,
 
-    inout   logic [15: 0]   ARDUINO_IO,
+    inout   logic [15: 2]   ARDUINO_IO,
 
     ///////// SDRAM /////////
     output             DRAM_CLK,