# This file is a template, and might need editing before it works on your project.
# This is a sample GitLab CI/CD configuration file that should run without any modifications.
# It demonstrates a basic 3 stage CI/CD pipeline. Instead of real tests or scripts,
# it uses echo commands to simulate the pipeline execution.
#
# A pipeline is composed of independent jobs that run scripts, grouped into stages.
# Stages run in sequential order, but jobs within stages run in parallel.
#
# For more information, see: https://docs.gitlab.com/ee/ci/yaml/index.html#stages
#
# You can copy and paste this template into a new `.gitlab-ci.yml` file.
# You should not add this template to an existing `.gitlab-ci.yml` file by using the `include:` keyword.
#
# To contribute improvements to CI/CD templates, please follow the Development guide at:
# https://docs.gitlab.com/ee/development/cicd/templates.html
# This specific template is located at:
# https://gitlab.com/gitlab-org/gitlab/-/blob/master/lib/gitlab/ci/templates/Getting-Started.gitlab-ci.yml

variables:
    GIT_SUBMODULE_PATHS: ":(exclude)hw/kicad_library"
    GIT_SUBMODULE_STRATEGY: recursive

stages:          # List of stages for jobs, and their order of execution
  - toolchain
  - build_sw
  - build_hw
  - simulate

build toolchain:
  retry: 2
  tags:
    - linux
  stage: toolchain
  script:
    - source init_env.sh
    - cd sw/cc65
    - make -j 12
  artifacts:
    paths:
      - sw/cc65/bin
      - sw/cc65/lib

build bios:
  tags:
    - linux
  stage: build_sw
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/init_hex.mem
  script:
    - source init_env.sh
    - cd sw/
    - make bios

build kernel:
  tags:
    - linux
  stage: build_sw
  needs:
    - job: build toolchain
      artifacts: true
  script:
    - source init_env.sh
    - cd sw/
    - make kernel

build fpga:       # This job runs in the build stage, which runs first.
  tags:
    - efinity
    - linux
  stage: build_hw
  needs:
    - job: build bios
      artifacts: true
  script:
    - source init_env.sh
    - cd hw/efinix_fpga
    - make


full sim:
  when: manual
  tags:
    - linux
    - iverilog
  stage: simulate
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/sim_top.vcd
      - hw/efinix_fpga/simulation/fs.fat
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM=$REPO_TOP/sw/bios/bios.hex TEST_FOLDER=$REPO_TOP/sw/bios make full_sim
  needs:
    - job: build toolchain
      artifacts: true
    - job: build bios
      artifacts: true
    - job: build kernel
      artifacts: true

mapper sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/mapper_tb.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - make mapper_tb
    - ./mapper_tb

mapper_code sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/mapper_code_tb.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM_NAME=mapper_test make mapper_code_tb
    - ./mapper_code_tb

interrupt_controller sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/interrupt_controller.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM_NAME=mapper_test make interrupt_controller_tb
    - ./interrupt_controller_tb

interrupt_controller_code sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/interrupt_controller_code.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM_NAME=mapper_test make interrupt_controller_code_tb
    - ./interrupt_controller_code_tb

rtc_code sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  artifacts:
    paths:
      - hw/efinix_fpga/simulation/interrupt_controller_code.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM_NAME=rtc_test make rtc_code_tb
    - ./rtc_code_tb

devices_setup_code sim:
  tags:
    - linux
    - iverilog
  stage: simulate
  needs:
    - job: build toolchain
      artifacts: true
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make clean
    - TEST_PROGRAM_NAME=devices_setup_test make devices_setup_code_tb  
    - ./devices_setup_code_tb