From 053b0d7e3efd911bf78c49faff84e52e356a5cbb Mon Sep 17 00:00:00 2001
From: Byron Lathi <bslathi19@gmail.com>
Date: Sat, 12 Aug 2023 19:03:24 -0700
Subject: [PATCH] Find bootloader in FAT

---
 hw/efinix_fpga/init_hex.mem  |  98 +++++++++++++--------------
 hw/efinix_fpga/super6502.xml |   2 +-
 sw/bios/Makefile             |   2 +-
 sw/bios/bootloader.s         | 127 +++++++++++++++--------------------
 sw/bios/link.ld              |   6 +-
 sw/script/format_disk.sh     |   2 +-
 6 files changed, 111 insertions(+), 126 deletions(-)

diff --git a/hw/efinix_fpga/init_hex.mem b/hw/efinix_fpga/init_hex.mem
index a702697..7d8cbd9 100644
--- a/hw/efinix_fpga/init_hex.mem
+++ b/hw/efinix_fpga/init_hex.mem
@@ -1,9 +1,9 @@
 @00000000
 00 80 4C 00 00 8D 13 90 8E 14 90 8D 1A 90 8E 1B
 90 88 B9 FF FF 8D 24 90 88 B9 FF FF 8D 23 90 8C
-26 90 20 FF FF A0 FF D0 E8 60 00 00 6F FD 00 00
-00 00 A2 FF 9A D8 A9 00 85 00 A9 E0 85 01 20 E7
-FD 20 B9 FA 20 52 F0 58 20 69 F2 6C FC FF 20 AD
+26 90 20 FF FF A0 FF D0 E8 60 00 00 90 FD 00 00
+00 00 A2 FF 9A D8 A9 00 85 00 A9 E0 85 01 20 08
+FE 20 B9 FA 20 52 F0 58 20 69 F2 6C FC FF 20 AD
 FA 00 A0 00 F0 07 A9 52 A2 F0 4C 05 90 60 AD FF
 EF A2 00 60 8D FF EF 60 20 4F F2 C9 0A D0 05 A9
 0D 20 4F F2 60 DA 5A A8 B2 00 AA A9 1B 20 4F F2
@@ -38,32 +38,32 @@ F2 68 60 A9 01 8D DB EF 60 9C DB EF 60 A9 00 8D
 DA EF AD DB EF 30 FB AD D9 EF 60 8D E6 EF 60 48
 8D E6 EF AD E7 EF 89 02 D0 F9 68 60 AD E6 EF A2
 00 60 AD E7 EF A2 00 60 60 20 74 FB A2 00 86 02
-86 03 A9 00 20 0B FC 20 5A FB A9 2C A2 FE 20 1A
-FB 20 3A F3 C9 00 20 B8 FC D0 03 4C 98 F2 A9 24
-A2 FE 20 1A FB 4C 2E F3 A9 1A A2 FE 20 1A FB A0
+86 03 A9 00 20 0B FC 20 5A FB A9 4D A2 FE 20 1A
+FB 20 3A F3 C9 00 20 B8 FC D0 03 4C 98 F2 A9 45
+A2 FE 20 1A FB 4C 2E F3 A9 3B A2 FE 20 1A FB A0
 05 20 C7 FB 20 0B FC AD 00 90 AE 01 90 20 11 FD
 A9 0C 20 D8 FB 20 96 F1 A0 07 91 00 A0 07 A2 00
 B1 00 C9 00 20 BE FC D0 03 4C DC F2 A0 06 A2 00
 B1 00 C9 FE 20 BE FC F0 03 4C E5 F2 A2 00 A9 00
 D0 03 4C E9 F2 A2 00 A9 01 D0 03 4C FA F2 AD 00
 90 AE 01 90 20 3C F6 4C 2B F3 A0 06 A2 00 B1 00
-A2 00 29 F0 20 9F FA D0 03 4C 16 F3 A9 24 A2 FE
-20 1A FB 4C 2B F3 A9 0A A2 FE 20 11 FD A0 08 A2
+A2 00 29 F0 20 9F FA D0 03 4C 16 F3 A9 45 A2 FE
+20 1A FB 4C 2B F3 A9 2B A2 FE 20 11 FD A0 08 A2
 00 B1 00 20 11 FD A0 04 20 E6 FA 6C 00 90 4C 31
 F3 4C 31 F3 A0 0C 20 85 FA 60 20 81 FB A9 00 20
 FB FC 20 6E F1 4C 71 F3 A0 00 A2 00 18 A9 01 71
 00 91 00 A0 00 A2 00 B1 00 C9 FF 20 BE FC D0 03
-4C 71 F3 A9 4E A2 FE 20 1A FB A2 00 A9 01 4C A8
+4C 71 F3 A9 6F A2 FE 20 1A FB A2 00 A9 01 4C A8
 F4 20 AC F4 A0 01 91 00 C9 01 20 B8 FC D0 C9 A2
 00 A9 00 A0 06 20 29 FD A0 07 20 BE FB E0 03 D0
 02 C9 E8 20 D7 FC F0 03 4C 9E F3 4C AA F3 A0 06
 A2 00 A9 01 20 75 FA 4C 88 F3 A9 01 20 D8 FB 20
 C9 F4 A0 01 A2 00 B1 00 C9 01 20 B8 FC D0 03 4C
-D0 F3 A9 44 A2 FE 20 1A FB A2 00 A9 01 4C A8 F4
+D0 F3 A9 65 A2 FE 20 1A FB A2 00 A9 01 4C A8 F4
 A0 05 A2 00 B1 00 C9 AA 20 B8 FC D0 03 4C E7 F3
 A2 00 A9 01 4C A8 F4 A2 00 A9 00 A0 00 91 00 A0
 00 A2 00 B1 00 C9 FF 20 BE FC D0 03 4C 0D F4 A9
-34 A2 FE 20 1A FB A2 00 A9 01 4C A8 F4 20 EB F5
+55 A2 FE 20 1A FB A2 00 A9 01 4C A8 F4 20 EB F5
 A0 01 91 00 A0 01 A2 00 B1 00 C9 02 20 D7 FC D0
 03 4C 2B F4 20 08 F6 A0 01 91 00 A2 00 A9 00 A0
 06 20 29 FD A0 07 20 BE FB E0 03 D0 02 C9 E8 20
@@ -101,13 +101,13 @@ FB FC A2 00 86 02 86 03 A9 00 20 0B FC A2 00 A9
 00 B1 00 4C 36 F6 A0 0E 20 85 FA 60 20 11 FD A9
 00 20 FB FC 20 5A FB A2 00 A9 00 A0 00 20 29 FD
 A0 01 20 BE FB E0 02 20 D7 FC F0 03 4C 62 F6 4C
-C4 F6 A9 58 A2 FE 20 11 FD A0 06 20 BE FB A0 00
+C4 F6 A9 79 A2 FE 20 11 FD A0 06 20 BE FB A0 00
 20 B3 FB 20 11 FD A0 07 A2 00 A9 01 20 75 FA A0
 04 20 E6 FA A0 02 A2 00 B1 00 C9 1F 20 BE FC D0
-03 4C A6 F6 A9 5C A2 FE 20 1A FB A2 00 A9 00 A0
+03 4C A6 F6 A9 7D A2 FE 20 1A FB A2 00 A9 00 A0
 02 91 00 4C B8 F6 A2 00 A9 20 20 68 F0 A0 02 A2
 00 18 A9 01 71 00 91 00 A0 00 A2 00 A9 01 20 75
-FA 4C 50 F6 A9 5C A2 FE 20 1A FB 20 A9 FB 60 A0
+FA 4C 50 F6 A9 7D A2 FE 20 1A FB 20 A9 FB 60 A0
 00 B1 16 E6 16 D0 02 E6 17 60 AD 3D 90 8D 38 90
 20 7B F7 A9 38 A2 90 20 11 FD 20 F2 FC 4C 02 90
 A5 14 38 E9 02 85 14 B0 02 C6 15 60 AD 42 90 D0
@@ -159,8 +159,8 @@ C9 73 D0 0C 20 19 F7 8D 59 90 8E 5A 90 4C 13 FA
 C9 75 D0 0B 20 FC F6 A0 0A 20 B5 F7 4C 13 FA C9
 78 F0 04 C9 58 D0 29 48 AD 3C 90 F0 0A A9 30 20
 63 F7 A9 58 20 63 F7 20 FC F6 A0 10 20 B5 F7 68
-C9 78 D0 09 AD 59 90 AE 5A 90 20 48 FD 4C 13 FA
-4C F5 F7 AD 59 90 AE 5A 90 20 32 FD 8D 5B 90 8E
+C9 78 D0 09 AD 59 90 AE 5A 90 20 69 FD 4C 13 FA
+4C F5 F7 AD 59 90 AE 5A 90 20 53 FD 8D 5B 90 8E
 5C 90 AD 40 90 0D 41 90 F0 15 AE 40 90 EC 5B 90
 AD 41 90 A8 ED 5C 90 B0 06 8E 5B 90 8C 5C 90 38
 AD 3E 90 ED 5B 90 AA AD 3F 90 ED 5C 90 B0 03 A9
@@ -175,11 +175,11 @@ D0 03 20 85 F7 20 90 F7 AD 39 90 F0 03 20 85 F7
 00 E8 F0 0D B1 08 91 0A C8 D0 F6 E6 09 E6 0B D0
 F0 E6 10 D0 EF 60 8C 5D 90 88 88 98 18 65 00 85
 08 A6 01 90 01 E8 86 09 A0 01 B1 08 AA 88 B1 08
-20 11 FD A5 08 A6 09 20 B7 FD AC 5D 90 4C 85 FA
+20 11 FD A5 08 A6 09 20 D8 FD AC 5D 90 4C 85 FA
 85 08 86 09 20 75 F0 4C 1E FB 85 08 86 09 A0 00
 B1 08 F0 0E C8 84 10 20 68 F0 A4 10 D0 F2 E6 09
-D0 EE 60 E0 00 D0 15 4A AA BD 86 FE 90 05 4A 4A
-4A 4A 18 29 0F AA BD 7B FE A2 00 60 38 A9 00 AA
+D0 EE 60 E0 00 D0 15 4A AA BD A7 FE 90 05 4A 4A
+4A 4A 18 29 0F AA BD 9C FE A2 00 60 38 A9 00 AA
 60 A4 00 D0 02 C6 01 C6 00 60 A5 00 38 E9 02 85
 00 90 01 60 C6 01 60 A5 00 38 E9 04 85 00 90 01
 60 C6 01 60 A5 00 38 E9 06 85 00 90 01 60 C6 01
@@ -196,11 +196,11 @@ A5 02 49 FF 69 00 85 02 A5 03 49 FF 69 00 85 03
 91 00 60 85 10 20 8E FB 85 0A 86 0B 85 0C 86 0D
 20 E4 FC 20 8E FB 85 02 86 03 60 20 23 FC A6 03
 A4 10 C0 0A D0 39 A5 02 05 09 05 08 D0 11 E0 80
-D0 0D A0 0B B9 6F FE 91 0A 88 10 F8 4C B3 FC 8A
+D0 0D A0 0B B9 90 FE 91 0A 88 10 F8 4C B3 FC 8A
 10 1D A9 2D A0 00 91 0A E6 0A D0 02 E6 0B A5 08
 A6 09 20 E4 FB 85 08 86 09 4C 7F FC 20 23 FC A9
 00 48 A0 20 A9 00 06 08 26 09 26 02 26 03 2A C5
-10 90 04 E5 10 E6 08 88 D0 EC A8 B9 5F FE 48 A5
+10 90 04 E5 10 E6 08 88 D0 EC A8 B9 80 FE 48 A5
 08 05 09 05 02 05 03 D0 D9 A0 00 68 91 0A F0 03
 C8 D0 F8 A5 0C A6 0D 60 D0 06 A2 00 8A 60 D0 FA
 A2 00 A9 01 60 F0 F9 30 F7 A2 00 8A 60 F0 02 10
@@ -210,34 +210,34 @@ EF A2 00 8A 60 F0 E9 90 E7 A2 00 8A 60 F0 DB A2
 00 A0 00 91 00 60 C6 01 C6 00 91 00 60 A9 00 A2
 00 48 A5 00 38 E9 02 85 00 B0 02 C6 01 A0 01 8A
 91 00 68 88 91 00 60 A0 00 91 00 C8 48 8A 91 00
-68 60 85 0A 86 0B A2 00 A0 00 B1 0A F0 08 C8 D0
-F9 E6 0B E8 D0 F4 98 60 85 08 86 09 85 0A 86 0B
-A0 00 B1 08 F0 14 20 37 FB 29 02 F0 06 B1 08 69
-20 91 08 C8 D0 EC E6 09 D0 E8 A5 0A A6 0B 60 20
-8E FB 85 0A 86 0B E8 8E 31 90 AA E8 8E 30 90 20
-E4 FC 20 8E FB 85 0C 86 0D A0 00 84 10 B1 0C 18
-65 0A 91 0C C8 B1 0C 65 0B 91 0C CE 30 90 F0 11
-A4 10 B1 08 C8 D0 02 E6 09 84 10 20 68 F0 4C 9B
-FD CE 31 90 D0 EA 60 85 08 86 09 A9 00 8D 2A 90
-8D 2B 90 A0 01 B1 00 AA 88 B1 00 20 11 FD A0 02
-A9 2A 91 00 C8 A9 90 91 00 A5 08 A6 09 20 C2 F7
-AD 2A 90 AE 2B 90 60 A9 32 85 08 A9 90 85 09 A9
-00 A8 A2 00 F0 0A 91 08 C8 D0 FB E6 09 CA D0 F6
-C0 2C F0 05 91 08 C8 D0 F7 60 62 61 64 20 74 6F
-6B 65 6E 3A 20 25 78 0D 0A 00 53 75 63 63 65 73
-73 0D 0A 00 45 72 72 6F 72 0D 0A 00 53 74 61 72
-74 0D 0A 00 6F 70 5F 63 6F 6E 64 20 65 72 72 6F
-72 0D 0A 00 49 46 20 43 6F 6E 64 0D 0A 00 47 6F
-20 49 44 4C 45 0D 0A 00 25 32 78 00 0D 0A 00 30
-31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 2D
-32 31 34 37 34 38 33 36 34 38 00 00 01 02 0C 09
-0A 10 40 50 A0 D0 66 66 66 66 A6 88 88 66 66 66
-66 66 66 66 66 66 09 00 00 00 00 00 00 00 33 33
-33 33 33 00 00 00 50 55 55 25 22 22 22 22 22 22
-22 22 22 02 00 00 40 44 44 14 11 11 11 11 11 11
-11 11 11 01 00 70 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+68 60 85 0A 86 0B 20 E4 FC B1 08 D1 0A D0 0C AA
+F0 10 C8 D0 F4 E6 09 E6 0B D0 EE B0 03 A2 FF 60
+A2 01 60 85 0A 86 0B A2 00 A0 00 B1 0A F0 08 C8
+D0 F9 E6 0B E8 D0 F4 98 60 85 08 86 09 85 0A 86
+0B A0 00 B1 08 F0 14 20 37 FB 29 02 F0 06 B1 08
+69 20 91 08 C8 D0 EC E6 09 D0 E8 A5 0A A6 0B 60
+20 8E FB 85 0A 86 0B E8 8E 31 90 AA E8 8E 30 90
+20 E4 FC 20 8E FB 85 0C 86 0D A0 00 84 10 B1 0C
+18 65 0A 91 0C C8 B1 0C 65 0B 91 0C CE 30 90 F0
+11 A4 10 B1 08 C8 D0 02 E6 09 84 10 20 68 F0 4C
+BC FD CE 31 90 D0 EA 60 85 08 86 09 A9 00 8D 2A
+90 8D 2B 90 A0 01 B1 00 AA 88 B1 00 20 11 FD A0
+02 A9 2A 91 00 C8 A9 90 91 00 A5 08 A6 09 20 C2
+F7 AD 2A 90 AE 2B 90 60 A9 32 85 08 A9 90 85 09
+A9 00 A8 A2 00 F0 0A 91 08 C8 D0 FB E6 09 CA D0
+F6 C0 2C F0 05 91 08 C8 D0 F7 60 62 61 64 20 74
+6F 6B 65 6E 3A 20 25 78 0D 0A 00 53 75 63 63 65
+73 73 0D 0A 00 45 72 72 6F 72 0D 0A 00 53 74 61
+72 74 0D 0A 00 6F 70 5F 63 6F 6E 64 20 65 72 72
+6F 72 0D 0A 00 49 46 20 43 6F 6E 64 0D 0A 00 47
+6F 20 49 44 4C 45 0D 0A 00 25 32 78 00 0D 0A 00
+30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46
+2D 32 31 34 37 34 38 33 36 34 38 00 00 01 02 0C
+09 0A 10 40 50 A0 D0 66 66 66 66 A6 88 88 66 66
+66 66 66 66 66 66 66 09 00 00 00 00 00 00 00 33
+33 33 33 33 00 00 00 50 55 55 25 22 22 22 22 22
+22 22 22 22 02 00 00 40 44 44 14 11 11 11 11 11
+11 11 11 11 01 00 70 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/hw/efinix_fpga/super6502.xml b/hw/efinix_fpga/super6502.xml
index a237ea4..b25c71e 100644
--- a/hw/efinix_fpga/super6502.xml
+++ b/hw/efinix_fpga/super6502.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<efx:project name="super6502" description="" last_change_date="Sat August 12 2023 16:08:22" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
+<efx:project name="super6502" description="" last_change_date="Sat August 12 2023 18:23:26" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
     <efx:device_info>
         <efx:family name="Trion"/>
         <efx:device name="T20F256"/>
diff --git a/sw/bios/Makefile b/sw/bios/Makefile
index 4f0ad6c..2b3d72f 100644
--- a/sw/bios/Makefile
+++ b/sw/bios/Makefile
@@ -21,7 +21,7 @@ all: $(HEX)
 
 $(HEX): $(BIN)
 	objcopy --input-target=binary --output-target=verilog $(BIN) $(HEX)
-	diff $(HEX) $(FPGA_IMG)
+	cmp $(HEX) $(FPGA_IMG)
 	
 
 $(BIN): $(OBJS)
diff --git a/sw/bios/bootloader.s b/sw/bios/bootloader.s
index d602d64..7cec63c 100644
--- a/sw/bios/bootloader.s
+++ b/sw/bios/bootloader.s
@@ -34,70 +34,6 @@ _main:
         ldx #>str
         jsr _cputs
 
-        lda #<_fat_count
-        ldx #>_fat_count
-        jsr pushax
-        lda $8010
-        ldx #$0
-        jsr pushax
-        ldy #$04
-        jsr _cprintf
-
-        ; this is offset from bpb?
-
-        lda #<_fat_sectors
-        ldx #>_fat_sectors
-        jsr pushax
-        lda $8026
-        sta sreg
-        ldx $8027
-        stx sreg + 1
-        lda $8024
-        ldx $8025
-        jsr pusheax
-        ldy #$06
-        jsr _cprintf
-
-        lda #<_reserved_sect
-        ldx #>_reserved_sect
-        jsr pushax
-        lda $800E
-        pha
-        ldx $800F
-        jsr pushax
-        ldy #$04
-        jsr _cprintf
-
-        lda #<addrh
-        sta sreg
-        lda #>addrh
-        sta sreg + 1
-        pla
-        clc
-        adc #<addrl
-        ldx #>addrl
-        jsr pusheax
-        lda #<buf
-        ldx #>buf
-        jsr pushax
-        lda #<ptr1
-        ldx #>ptr1
-        jsr _SD_readSingleBlock
-        
-        lda #<buf
-        ldx #>buf
-        jsr _SD_printBuf
-
-        lda #<rd_word
-        ldx #>rd_word
-        jsr pushax
-
-        lda buf
-        ldx #$00
-        jsr pushax
-        ldy #$4
-        jsr _cprintf
-
         ; we need to read from data segment 0, that will be the first directory entry
         ; that has sector offset $00ef_e000
 
@@ -120,16 +56,63 @@ _main:
         jsr _SD_printBuf
 
 
+        lda #$20
+        sta ptr2
+        lda #$82
+        sta ptr2 + 1
+        ldy #$0b
+@1:     lda (ptr2),y
+
+        cmp #$0f
+        bne @2
+        clc
+        lda ptr2
+        adc #$20
+        sta ptr2
+        bra @1
+
+@2:     lda #$00
+        sta (ptr2),y
+        lda #<entry
+        ldx #>entry
+        jsr _cputs
+        lda #<name
+        ldx #>name
+        jsr pushax
+        clc
+        tya
+        adc ptr2
+        pha
+        ldx ptr2 + 1
+        phx
+        jsr pushax
+        ldy #$4
+        jsr _cprintf
+        lda #<_boot2_str
+        ldx #>_boot2_str
+        jsr pushax
+        plx
+        pla
+        jsr _strcmp
+        bne @fail
+        lda #<_good
+        ldx #>_good
+        jsr _cputs
+        bra @end
+
+@fail:  lda #<_fail
+        ldx #>_fail
+        jsr _cputs
+
 @end:   bra @end
 
-_reserved_sect:
-        .asciiz "Reserved Sectors: %x\r\n"
-_fat_sectors:
-        .asciiz "Sectors per fat: %lx\r\n"
-_fat_count:
-        .asciiz "Fat Count: %x\r\n"
-str: .asciiz "Hello from the bootloader!\r\n"
-rd_word: .asciiz "Read: %x\r\n"
+str: .asciiz "boot\r\n"
+lfn: .asciiz "Found LFN\r\n"
+entry: .asciiz "Found valid entry\r\n"
+name: .asciiz "entry name: %s\r\n"
+_boot2_str: .asciiz "BOOT2   BIN"
+_fail: .asciiz "not bootloader\r\n"
+_good: .asciiz "found bootloader!\r\n"
 _end:
 
 .res (440+_start-_end)
diff --git a/sw/bios/link.ld b/sw/bios/link.ld
index 0d5646a..53739f5 100644
--- a/sw/bios/link.ld
+++ b/sw/bios/link.ld
@@ -3,7 +3,8 @@ MEMORY
   ZP:  start = $0,    size = $100,  type = rw, define = yes;
   KERNEL: start = $1000, size = $7000, type = rw, define = yes;
   SDRAM: start = $9000, size = $5000, type = rw, define = yes;
-  BOOTLOADER: start = $8000, size = $1000, type = rw, define = yes, file = "bootloader.bin";
+  BOOTSECTOR: start = $8000, size = $200, type = rw, define = yes, file = "bootloader.bin";
+  BOOTLOADER: start = $8200, size = $1000, type = rw, define = yes, file = "boot2.bin";
   ROM: start = $F000, size = $1000, file = %O;
 }
 
@@ -17,7 +18,8 @@ SEGMENTS {
     CODE:     load = ROM, type = ro;
     RODATA:   load = ROM, type = ro;
     VECTORS:  load = ROM, type = ro,  start    = $FFFA;
-    BOOTSECTOR: load = BOOTLOADER, type = rw, start = $8000;
+    BOOTSECTOR: load = BOOTSECTOR, type = rw, start = $8000;
+    BOOTLOADER: load = BOOTLOADER, type = rw;
 }
 
 FEATURES {
diff --git a/sw/script/format_disk.sh b/sw/script/format_disk.sh
index 76402d5..af66e59 100644
--- a/sw/script/format_disk.sh
+++ b/sw/script/format_disk.sh
@@ -10,7 +10,7 @@ V=-v
 STATUS=
 
 echo "$(tput bold setaf 11)Creating Filesystem$(tput sgr 0)"
-sudo mkfs.vfat -F32 $DEVICE -n SUPER6502 $V
+sudo mkfs.vfat -I -F32 $DEVICE -n SUPER6502 $V
 echo
 
 echo "$(tput bold setaf 11)Modifying Boot Sector$(tput sgr 0)"