Add io chip select

hw/fpga/addr_decode.sv

@@ -1,10 +1,12 @@
 module addr_decode(
     input logic [15:0] addr,
     output logic ram_cs,
-    output logic rom_cs
+    output logic rom_cs,
+    output logic io_cs
 );
 
 assign rom_cs = addr[15];
-assign ram_cs = ~addr[15];
+assign ram_cs = ~addr[15] && addr < 16'h7ff0;
+assign io_cs = addr >= 16'h7ff0 && addr < 16'h8000;
 
 endmodule

hw/fpga/hvl/cs_testbench.sv

@@ -7,7 +7,7 @@ timeprecision 1ns;
 logic [15:0] addr;
 logic ram_cs;
 logic rom_cs;
-
+logic io_cs;
 
 addr_decode dut(.*);
 
@@ -16,11 +16,16 @@ initial begin : TEST_VECTORS
     for (int i = 0; i < 2**16; i++) begin
         addr <= i;
         #1
-        if (i < 2**15) begin
+        if (i < 16'h7ff0) begin
             assert(ram_cs == '1)
             else
                 $error("Bad CS! addr=%4x should have ram_cs!", addr);
         end
+        if (i >= 16'h7ff0 && i < 16'h8000) begin
+            assert(io_cs == '1)
+            else
+                $error("Bad CS! addr=%4x should have io_cs!", addr);
+        end
         if (i >= 2**15) begin
             assert(rom_cs == '1)
             else