add uart interrupt

2023-11-21 18:47:16 -08:00
parent 4392a01de8
commit 1714a1e6da
5 changed files with 272 additions and 254 deletions
--- a/hw/efinix_fpga/simulation/tbs/uart_irq_tb.sv
+++ b/hw/efinix_fpga/simulation/tbs/uart_irq_tb.sv
@@ -0,0 +1,15 @@
+`timescale 1ns/1ps
+
+module uart_irq_tb();
+
+sim_top u_sim_top();
+
+initial begin
+    u_sim_top.u_sim_uart.tx_en = 1;
+    @(posedge u_sim_top.r_clk_cpu);
+    u_sim_top.u_sim_uart.tx_data = 8'hAA;
+    repeat (100) @(posedge u_sim_top.r_clk_cpu);
+    $finish();
+end
+
+endmodule