diff --git a/hw/super6502_fpga/src/sim/hvl/sim_top.sv b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
index 94a10bb..1eca534 100644
--- a/hw/super6502_fpga/src/sim/hvl/sim_top.sv
+++ b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
@@ -162,7 +162,13 @@ super6502_fpga u_dut (
     .o_sd_dat_oe            (o_sd_dat_oe),
     .o_sd_clk               (o_sd_clk),
     .o_sd_cs                (o_sd_cs)
+);
 
+sd_card_emu u_sd_card_emu(
+    .clk(o_sd_clk),
+    .rst(~button_reset),
+    .i_cmd(o_sd_cmd),
+    .o_cmd(i_sd_cmd)
 );
 
 initial begin
diff --git a/hw/super6502_fpga/src/sim/sources.list b/hw/super6502_fpga/src/sim/sources.list
index fd86d41..916dd74 100644
--- a/hw/super6502_fpga/src/sim/sources.list
+++ b/hw/super6502_fpga/src/sim/sources.list
@@ -1,4 +1,6 @@
 hvl/sim_top.sv
 sub/verilog-6502/ALU.v
 sub/verilog-6502/cpu_65c02.v
-sub/sim_sdram/generic_sdr.v
\ No newline at end of file
+sub/sim_sdram/generic_sdr.v
+sub/verilog-sd-emulator/src/sd_card_command.sv
+sub/verilog-sd-emulator/src/sd_card_emu.sv
\ No newline at end of file
diff --git a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator b/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
index 72a7868..35c74ed 160000
--- a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
+++ b/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
@@ -1 +1 @@
-Subproject commit 72a7868fa926a8bdc612dddbcd1921aa75abe7c6
+Subproject commit 35c74ed8d78d9378dcf6634507ce958064b4c8e2