From 25f51deaa7382326481af6eb99bdf5721933e11f Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Sun, 17 Mar 2024 22:26:42 -0700 Subject: [PATCH] Synthesize sd card dma --- hw/super6502_fpga/sources.list | 3 +- hw/super6502_fpga/src/rtl/super_6502_fpga.sv | 56 ++++-- hw/super6502_fpga/src/sub/rtl-common | 2 +- hw/super6502_fpga/src/sub/sd_controller | 2 +- hw/super6502_fpga/super6502_fpga.xml | 174 +++++++++---------- sw/test_code/sd_controller_test/main.s | 19 ++ 6 files changed, 148 insertions(+), 108 deletions(-) diff --git a/hw/super6502_fpga/sources.list b/hw/super6502_fpga/sources.list index 7c75831..0ef340c 100644 --- a/hw/super6502_fpga/sources.list +++ b/hw/super6502_fpga/sources.list @@ -20,4 +20,5 @@ src/sub/sd_controller/src/crc16.sv src/sub/sd_controller/src/sd_command.sv src/sub/sd_controller/src/sd_control.sv src/sub/sd_controller/src/sd_controller_top.sv -src/sub/sd_controller/src/sd_data.sv \ No newline at end of file +src/sub/sd_controller/src/sd_data.sv +src/sub/sd_controller/src/sd_dma.sv \ No newline at end of file diff --git a/hw/super6502_fpga/src/rtl/super_6502_fpga.sv b/hw/super6502_fpga/src/rtl/super_6502_fpga.sv index 93ed8e4..a1fae5c 100644 --- a/hw/super6502_fpga/src/rtl/super_6502_fpga.sv +++ b/hw/super6502_fpga/src/rtl/super_6502_fpga.sv @@ -236,29 +236,29 @@ cpu_wrapper u_cpu_wrapper_0( axi_crossbar #( - .N_INITIATORS(1), + .N_INITIATORS(2), .N_TARGETS(4) ) u_crossbar ( .clk(i_sysclk), .rst(~master_reset), - .ini_araddr ({cpu0_ARADDR }), - .ini_arvalid ({cpu0_ARVALID }), - .ini_arready ({cpu0_ARREADY }), - .ini_rdata ({cpu0_RDATA }), - .ini_rresp ({cpu0_RRESP }), - .ini_rvalid ({cpu0_RVALID }), - .ini_rready ({cpu0_RREADY }), - .ini_awaddr ({cpu0_AWADDR }), - .ini_awready ({cpu0_AWREADY }), - .ini_awvalid ({cpu0_AWVALID }), - .ini_wvalid ({cpu0_WVALID }), - .ini_wready ({cpu0_WREADY }), - .ini_wdata ({cpu0_WDATA }), - .ini_wstrb ({cpu0_WSTRB }), - .ini_bresp ({cpu0_BRESP }), - .ini_bvalid ({cpu0_BVALID }), - .ini_bready ({cpu0_BREADY }), + .ini_araddr ({cpu0_ARADDR, sd_controller_dma_ARADDR }), + .ini_arvalid ({cpu0_ARVALID, sd_controller_dma_ARVALID }), + .ini_arready ({cpu0_ARREADY, sd_controller_dma_ARREADY }), + .ini_rdata ({cpu0_RDATA, sd_controller_dma_RDATA }), + .ini_rresp ({cpu0_RRESP, sd_controller_dma_RRESP }), + .ini_rvalid ({cpu0_RVALID, sd_controller_dma_RVALID }), + .ini_rready ({cpu0_RREADY, sd_controller_dma_RREADY }), + .ini_awaddr ({cpu0_AWADDR, sd_controller_dma_AWADDR }), + .ini_awready ({cpu0_AWREADY, sd_controller_dma_AWREADY }), + .ini_awvalid ({cpu0_AWVALID, sd_controller_dma_AWVALID }), + .ini_wvalid ({cpu0_WVALID, sd_controller_dma_WVALID }), + .ini_wready ({cpu0_WREADY, sd_controller_dma_WREADY }), + .ini_wdata ({cpu0_WDATA, sd_controller_dma_WDATA }), + .ini_wstrb ({cpu0_WSTRB, sd_controller_dma_WSTRB }), + .ini_bresp ({cpu0_BRESP, sd_controller_dma_BRESP }), + .ini_bvalid ({cpu0_BVALID, sd_controller_dma_BVALID }), + .ini_bready ({cpu0_BREADY, sd_controller_dma_BREADY }), .tgt_araddr ({ram_araddr, rom_araddr, sdram_ARADDR, sd_controller_csr_ARADDR }), .tgt_arvalid ({ram_arvalid, rom_arvalid, sdram_ARVALID, sd_controller_csr_ARVALID }), .tgt_arready ({ram_arready, rom_arready, sdram_ARREADY, sd_controller_csr_ARREADY }), @@ -479,6 +479,26 @@ sd_controller_top u_sd_controller ( .s_apb_prdata(sd_controller_apb_prdata), .s_apb_pslverr(sd_controller_apb_pslverr), + .o_AWVALID (sd_controller_dma_AWVALID), + .i_AWREADY (sd_controller_dma_AWREADY), + .o_AWADDR (sd_controller_dma_AWADDR), + .o_WVALID (sd_controller_dma_WVALID), + .i_WREADY (sd_controller_dma_WREADY), + .o_WDATA (sd_controller_dma_WDATA), + .o_WSTRB (sd_controller_dma_WSTRB), + .i_BVALID (sd_controller_dma_BVALID), + .o_BREADY (sd_controller_dma_BREADY), + .i_BRESP (sd_controller_dma_BRESP), + .o_ARVALID (sd_controller_dma_ARVALID), + .i_ARREADY (sd_controller_dma_ARREADY), + .o_ARADDR (sd_controller_dma_ARADDR), + .i_RVALID (sd_controller_dma_RVALID), + .o_RREADY (sd_controller_dma_RREADY), + .i_RDATA (sd_controller_dma_RDATA), + .i_RRESP (sd_controller_dma_RRESP), + + + .i_sd_cmd(i_sd_cmd), .o_sd_cmd(o_sd_cmd), .o_sd_cmd_oe(o_sd_cmd_oe), diff --git a/hw/super6502_fpga/src/sub/rtl-common b/hw/super6502_fpga/src/sub/rtl-common index bdf655b..401042b 160000 --- a/hw/super6502_fpga/src/sub/rtl-common +++ b/hw/super6502_fpga/src/sub/rtl-common @@ -1 +1 @@ -Subproject commit bdf655b77bfaddc832b1bdf748cb516b91446a48 +Subproject commit 401042bb0ff9db0f44dab9cb6e08c71058a1bcb1 diff --git a/hw/super6502_fpga/src/sub/sd_controller b/hw/super6502_fpga/src/sub/sd_controller index 52665b1..a16ffb4 160000 --- a/hw/super6502_fpga/src/sub/sd_controller +++ b/hw/super6502_fpga/src/sub/sd_controller @@ -1 +1 @@ -Subproject commit 52665b1b897ef77b79caf687c9dbfda4f62110a5 +Subproject commit a16ffb427c6ac8857fd14b6fb9fe1614399b3cbc diff --git a/hw/super6502_fpga/super6502_fpga.xml b/hw/super6502_fpga/super6502_fpga.xml index 88d787d..cb3545b 100644 --- a/hw/super6502_fpga/super6502_fpga.xml +++ b/hw/super6502_fpga/super6502_fpga.xml @@ -1,105 +1,105 @@ - - + - - - + + + - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + - - + + - - + + - + - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - + + + + + + + - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + - - - + + + - + \ No newline at end of file diff --git a/sw/test_code/sd_controller_test/main.s b/sw/test_code/sd_controller_test/main.s index 786df0c..8576a2a 100644 --- a/sw/test_code/sd_controller_test/main.s +++ b/sw/test_code/sd_controller_test/main.s @@ -11,6 +11,9 @@ SD_ARG = SD_CONTROLLER + $4 SD_RESP = SD_CONTROLLER + $10 CLK_DIV = $20 +SD_DMA_BASE = SD_CONTROLLER + $28 +SD_DMA_STAT_CTRL = SD_CONTROLLER + $2C + .zeropage rca: .res 4 @@ -107,6 +110,22 @@ card_ready: lda #17 sta SD_CONTROLLER + lda #$10 + sta SD_DMA_BASE + 1 + lda #1 + sta SD_DMA_STAT_CTRL + +@poll: lda SD_DMA_STAT_CTRL+2 + cmp #$1 + bne @poll + stz SD_DMA_STAT_CTRL + + lda $1000 + lda $1001 + lda $1002 + lda $1003 + + @end: bra @end delay: