add testbench for SD command tx

Sends a few commands which we know the proper checksum for and makes
sure that the bits on the output are correct.

.gitlab-ci.yml

@@ -52,3 +52,10 @@ test_crc7:
     script:
       - cd hw/fpga/simulation/modelsim/
       - vsim -do "do crc7_testbench.do"
+
+test_sd_cmd:
+    stage: test
+    image: bslathi19/modelsim_18.1:lite
+    script:
+      - cd hw/fpga/simulation/modelsim/
+      - vsim -do "sd_cmd_testbench.do"