Add REPO_TOP env var

This commit is contained in:
Byron Lathi
2023-09-24 10:34:07 -07:00
parent 9bd031e35e
commit 3fcfa4d3ac
3 changed files with 7 additions and 3 deletions

View File

@@ -4,7 +4,9 @@ SRCS+=$(shell find ../src/ -type f -name "*.*v")
INC=$(shell find include/ -type f) INC=$(shell find include/ -type f)
TEST_PROGRAM=../../../sw/test_code/simple_mem_test/simple_mem_test.hex TEST_PROGRAM_NAME=simple_mem_test
TEST_PROGRAM=$(REPO_TOP)/sw/test_code/$(TEST_PROGRAM_NAME)/$(TEST_PROGRAM_NAME).hex
#TODO implement something like sources.list #TODO implement something like sources.list
@@ -22,4 +24,4 @@ $(INIT_MEM):
.PHONY: clean .PHONY: clean
clean: clean:
rm -rf $(TARGET) rm -rf $(TARGET)
rm $(INIT_MEM) rm -rf $(INIT_MEM)

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@@ -20,6 +20,8 @@
# export PATH=$PATH:"$EFXPT_HOME/bin" # export PATH=$PATH:"$EFXPT_HOME/bin"
source $EFX_SETUP source $EFX_SETUP
export REPO_TOP=$(git rev-parse --show-toplevel)
# python -m venv .user_venv --system-site-packages # python -m venv .user_venv --system-site-packages
# . .user_venv/bin/activate # . .user_venv/bin/activate

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@@ -7,7 +7,7 @@ NAME=bios
BIN=$(NAME).bin BIN=$(NAME).bin
HEX=$(NAME).hex HEX=$(NAME).hex
FPGA_IMG=../../hw/efinix_fpga/init_hex.mem FPGA_IMG=$(REPO_TOP)/hw/efinix_fpga/init_hex.mem
EFX_RUN=/home/byron/Software/efinity/2023.1/scripts/efx_run.py EFX_RUN=/home/byron/Software/efinity/2023.1/scripts/efx_run.py
EFX_PRJ=/home/byron/Projects/super6502/hw/efinix_fpga/super6502.xml EFX_PRJ=/home/byron/Projects/super6502/hw/efinix_fpga/super6502.xml