Demonstrate basic interrupt functionality

2023-11-15 08:42:02 -08:00
parent 2b248db94f
commit 40c54e26c0
2 changed files with 20 additions and 13 deletions
--- a/hw/efinix_fpga/simulation/tbs/interrupt_controller_tb.sv
+++ b/hw/efinix_fpga/simulation/tbs/interrupt_controller_tb.sv
@@ -81,6 +81,9 @@ initial begin
    @(posedge r_clk_cpu)
    int_in = 0;
    repeat (5) @(posedge r_clk_cpu);
+    write_reg(0, 8'hff);
+    write_reg(1, 8'h01);
+    repeat (5) @(posedge r_clk_cpu);
    $finish();
 end