From 42fbc17a2aec4475666c72f86aa9ce8e66eb91bd Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Sun, 3 Mar 2024 12:52:44 -0800 Subject: [PATCH] Add test code and top level Makefile --- .gitmodules | 3 ++ Makefile | 33 ++++++++++++++++--- doc/hw/super6502.md | 0 hw/Makefile | 6 ---- hw/super6502_fpga/super6502_fpga.xml | 2 +- script/generate_rom_image.py | 40 +++++++++++++++++++++++ sw/test_code/loop_test/Makefile | 39 ++++++++++++++++++++++ sw/test_code/loop_test/link.ld | 30 +++++++++++++++++ sw/test_code/loop_test/lists/main.s.list | 31 ++++++++++++++++++ sw/test_code/loop_test/loop_test.bin | Bin 0 -> 256 bytes sw/test_code/loop_test/loop_test.map | 28 ++++++++++++++++ sw/test_code/loop_test/main.o | Bin 0 -> 505 bytes sw/test_code/loop_test/main.s | 26 +++++++++++++++ sw/toolchain/cc65 | 1 + 14 files changed, 227 insertions(+), 12 deletions(-) create mode 100644 doc/hw/super6502.md delete mode 100644 hw/Makefile create mode 100644 script/generate_rom_image.py create mode 100644 sw/test_code/loop_test/Makefile create mode 100644 sw/test_code/loop_test/link.ld create mode 100644 sw/test_code/loop_test/lists/main.s.list create mode 100644 sw/test_code/loop_test/loop_test.bin create mode 100644 sw/test_code/loop_test/loop_test.map create mode 100644 sw/test_code/loop_test/main.o create mode 100644 sw/test_code/loop_test/main.s create mode 160000 sw/toolchain/cc65 diff --git a/.gitmodules b/.gitmodules index 07a7976..d5d9d2b 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,3 +4,6 @@ [submodule "hw/super6502_fpga/src/sub/axi_crossbar"] path = hw/super6502_fpga/src/sub/axi_crossbar url = ../axi_crossbar.git +[submodule "sw/toolchain/cc65"] + path = sw/toolchain/cc65 + url = ../cc65.git diff --git a/Makefile b/Makefile index 7b9cb5d..432a119 100644 --- a/Makefile +++ b/Makefile @@ -1,9 +1,32 @@ -all: hw +ROM_TARGET=test_code/loop_test -.PHONY: hw -hw: - $(MAKE) -C hw +INIT_HEX=hw/super6502_fpga/init_hex.mem +HEX=sw/$(ROM_TARGET)/$(notdir $(ROM_TARGET)).bin + + +all: fpga_image + +# FPGA +.PHONY: fpga_image +fpga_image: $(INIT_HEX) + $(MAKE) -C hw/super6502_fpga + + +# SW +.PHONY: toolchain +toolchain: + $(MAKE) -C sw/toolchain/cc65 -j $(shell nproc) + +$(INIT_HEX): toolchain script/generate_rom_image.py $(HEX) + python script/generate_rom_image.py -i $(HEX) -o $@ + +$(HEX): + $(MAKE) -C sw/$(ROM) $(notdir $@) .PHONY: clean clean: - $(MAKE) -C hw $@ \ No newline at end of file + $(MAKE) -C hw/super6502_fpga $@ + +.PHONY: distclean +distclean: clean + $(MAKE) -C sw/toolchain/cc65 clean \ No newline at end of file diff --git a/doc/hw/super6502.md b/doc/hw/super6502.md new file mode 100644 index 0000000..e69de29 diff --git a/hw/Makefile b/hw/Makefile deleted file mode 100644 index cacf66e..0000000 --- a/hw/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -all: - $(MAKE) -C super6502_fpga - -.PHONY: clean -clean: - $(MAKE) -C super6502_fpga $@ \ No newline at end of file diff --git a/hw/super6502_fpga/super6502_fpga.xml b/hw/super6502_fpga/super6502_fpga.xml index 71190d7..8ba978f 100644 --- a/hw/super6502_fpga/super6502_fpga.xml +++ b/hw/super6502_fpga/super6502_fpga.xml @@ -1,4 +1,4 @@ - + diff --git a/script/generate_rom_image.py b/script/generate_rom_image.py new file mode 100644 index 0000000..b07c8d4 --- /dev/null +++ b/script/generate_rom_image.py @@ -0,0 +1,40 @@ +import getopt +import sys + +# ROM size in bytes +ROM_SIZE = 2**16 +DATA_WIDTH = 32 + +NUM_ENTRIES = ROM_SIZE // (DATA_WIDTH//8) + +def main(argv): + inputfile = '' + outputfile = '' + opts, args = getopt.getopt(argv,"hi:o:",["ifile=","ofile="]) + for opt, arg in opts: + if opt == '-h': + print ('test.py -i -o ') + sys.exit() + elif opt in ("-i", "--ifile"): + inputfile = arg + elif opt in ("-o", "--ofile"): + outputfile = arg + + with open(outputfile, "w") as init_file, open(inputfile, "rb") as hex_file: + init_file.write("@00000000\n") + + while True: + hex_bytes = hex_file.read(4) + if len(hex_bytes) == 0: + break + + val = int.from_bytes(hex_bytes, byteorder="little") + init_file.write(f"{val:x}\n") + + if len(hex_bytes) < 4: + break + + print("Done!") + +if __name__ == "__main__": + main(sys.argv[1:]) \ No newline at end of file diff --git a/sw/test_code/loop_test/Makefile b/sw/test_code/loop_test/Makefile new file mode 100644 index 0000000..295cadb --- /dev/null +++ b/sw/test_code/loop_test/Makefile @@ -0,0 +1,39 @@ +CC=../../toolchain/cc65/bin/cl65 +LD=../../toolchain/cc65/bin/cl65 +CFLAGS=-T -t none -I. --cpu "65C02" +LDFLAGS=-C link.ld -m $(NAME).map + +NAME=loop_test + +BIN=$(NAME).bin +HEX=$(NAME).hex + +LISTS=lists + +SRCS=$(wildcard *.s) $(wildcard *.c) +SRCS+=$(wildcard **/*.s) $(wildcard **/*.c) +OBJS+=$(patsubst %.s,%.o,$(filter %s,$(SRCS))) +OBJS+=$(patsubst %.c,%.o,$(filter %c,$(SRCS))) + +# Make sure the kernel linked to correct address, no relocation! +all: $(HEX) + +$(HEX): $(BIN) + objcopy --input-target=binary --output-target=verilog $(BIN) $(HEX) + +$(BIN): $(OBJS) + $(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $@ + +%.o: %.c $(LISTS) + $(CC) $(CFLAGS) -l $(LISTS)/$<.list -c $< -o $@ + +%.o: %.s $(LISTS) + $(CC) $(CFLAGS) -l $(LISTS)/$<.list -c $< -o $@ + +$(LISTS): + mkdir -p $(addprefix $(LISTS)/,$(sort $(dir $(SRCS)))) + +.PHONY: clean +clean: + rm -rf $(OBJS) $(BIN) $(HEX) $(LISTS) $(NAME).map + diff --git a/sw/test_code/loop_test/link.ld b/sw/test_code/loop_test/link.ld new file mode 100644 index 0000000..44fc445 --- /dev/null +++ b/sw/test_code/loop_test/link.ld @@ -0,0 +1,30 @@ +MEMORY +{ + RAM: start = $0000, size = $200; + ROM: start = $FF00, size = $100, file = %O; +} + +SEGMENTS { + ZEROPAGE: load = RAM, type = zp, define = yes; + DATA: load = ROM, type = rw, define = yes; + CODE: load = ROM, type = ro; + RODATA: load = ROM, type = ro; + VECTORS: load = ROM, type = ro, start = $FFFA; +} + +FEATURES { + CONDES: segment = STARTUP, + type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__; + CONDES: segment = STARTUP, + type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__; +} + +SYMBOLS { + # Define the stack size for the application + __STACKSIZE__: value = $0200, type = weak; + __STACKSTART__: type = weak, value = $0800; # 2k stack +} diff --git a/sw/test_code/loop_test/lists/main.s.list b/sw/test_code/loop_test/lists/main.s.list new file mode 100644 index 0000000..07ca6e5 --- /dev/null +++ b/sw/test_code/loop_test/lists/main.s.list @@ -0,0 +1,31 @@ +ca65 V2.19 - Git 71b58f796 +Main file : main.s +Current file: main.s + +000000r 1 .export _init, _nmi_int, _irq_int +000000r 1 +000000r 1 +000000r 1 SDRAM = $200 +000000r 1 +000000r 1 .segment "VECTORS" +000000r 1 +000000r 1 rr rr .addr _nmi_int ; NMI vector +000002r 1 rr rr .addr _init ; Reset vector +000004r 1 rr rr .addr _irq_int ; IRQ/BRK vector +000006r 1 +000006r 1 .code +000000r 1 +000000r 1 _nmi_int: +000000r 1 _irq_int: +000000r 1 +000000r 1 _init: +000000r 1 A9 00 lda #$00 +000002r 1 @start: +000002r 1 8D 00 02 sta SDRAM +000005r 1 CD 00 02 cmp SDRAM +000008r 1 D0 03 bne @end +00000Ar 1 1A ina +00000Br 1 80 F5 bra @start +00000Dr 1 +00000Dr 1 80 FE @end: bra @end +00000Dr 1 diff --git a/sw/test_code/loop_test/loop_test.bin b/sw/test_code/loop_test/loop_test.bin new file mode 100644 index 0000000000000000000000000000000000000000..bf7ab228ed7134859a8dcae089e5dab249c7f21a GIT binary patch literal 256 dcmZ3<(96JdmVxO4vsA;^hJOqr2>fRNLIA%K2;~3( literal 0 HcmV?d00001 diff --git a/sw/test_code/loop_test/loop_test.map b/sw/test_code/loop_test/loop_test.map new file mode 100644 index 0000000..e41199a --- /dev/null +++ b/sw/test_code/loop_test/loop_test.map @@ -0,0 +1,28 @@ +Modules list: +------------- +main.o: + CODE Offs=000000 Size=00000F Align=00001 Fill=0000 + VECTORS Offs=000000 Size=000006 Align=00001 Fill=0000 + + +Segment list: +------------- +Name Start End Size Align +---------------------------------------------------- +CODE 00FF00 00FF0E 00000F 00001 +VECTORS 00FFFA 00FFFF 000006 00001 + + +Exports list by name: +--------------------- + + + +Exports list by value: +---------------------- + + + +Imports list: +------------- + diff --git a/sw/test_code/loop_test/main.o b/sw/test_code/loop_test/main.o new file mode 100644 index 0000000000000000000000000000000000000000..ec86438659032c011dbc7d4971f38b03f30ad7eb GIT binary patch literal 505 zcmX|-J5K^p5QS&%K7f^nsHmZ$@KH&E2_S_DD-aTcqPz+lM8#waHsMhi8cC?B{1ql9 z7B>C~6I)~JUocvsX9!`l=bUfu&hFhi^`YAe6VWB)gB-{Ub)g9~g&6vSwxKN)3b~6s zN8Tatkv~Y>v@_4&c`Bu{PcIM8CiC&fSNl_W4$);%h?Pa^kys~fLW(ug-Vh$*clHu% zVo~-Jk2pm9EjHpH@sxumKCpz{6bbnk6j)FY#IvWN*;)jB%Ve_BtTC}qOo>^fy|OaK zXbLE{z`C%Z*ay~xO@)2%_9|?4z}b{&O=h$rhP{Ynf)tT*T}*^C;?l)7q{g2RMa4Fy z43pVuIc~fky>6wFvBrKpk%{faiq0UGPFy7qZqu2R(R5sA;BC4c2Ly0>T>+z-uh=I> zyzdO#X0|_Q^#*#j?cV6Qa=u_z%6YqHYe&_pF5tZ=RLW;|v7n#UOC?XEkgJs|Rib}H CXF;_9 literal 0 HcmV?d00001 diff --git a/sw/test_code/loop_test/main.s b/sw/test_code/loop_test/main.s new file mode 100644 index 0000000..60aebb7 --- /dev/null +++ b/sw/test_code/loop_test/main.s @@ -0,0 +1,26 @@ +.export _init, _nmi_int, _irq_int + +.segment "VECTORS" + +.addr _nmi_int ; NMI vector +.addr _init ; Reset vector +.addr _irq_int ; IRQ/BRK vector + +.zeropage +tmp: .res 1 + +.code + +_nmi_int: +_irq_int: + +_init: + lda #$00 +@start: + sta tmp + cmp tmp + bne @end + ina + bra @start + +@end: bra @end \ No newline at end of file diff --git a/sw/toolchain/cc65 b/sw/toolchain/cc65 new file mode 160000 index 0000000..71b58f7 --- /dev/null +++ b/sw/toolchain/cc65 @@ -0,0 +1 @@ +Subproject commit 71b58f79678db2b0e826bd14ba5b7ff6ee67d70d