From 455814ec14b0e4f06601891578bedd5e828c2829 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Tue, 12 Mar 2024 18:20:51 -0700 Subject: [PATCH] Update sd controller and test code --- Makefile | 6 +- hw/super6502_fpga/src/sub/sd_controller | 2 +- sw/test_code/sd_controller_test/main.s | 106 ++++++++++++++++++++++++ 3 files changed, 110 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index a56ae02..96f4ed7 100644 --- a/Makefile +++ b/Makefile @@ -3,6 +3,7 @@ ROM_TARGET=test_code/sd_controller_test INIT_HEX=hw/super6502_fpga/init_hex.mem HEX=sw/$(ROM_TARGET)/$(notdir $(ROM_TARGET)).bin +CC65=sw/toolchain/cc65/bin all: fpga_image @@ -21,11 +22,10 @@ waves: sim gtkwave hw/super6502_fpga/src/sim/sim_top.vcd # SW -.PHONY: toolchain -toolchain: +$(CC65): $(MAKE) -C sw/toolchain/cc65 -j $(shell nproc) -$(INIT_HEX): toolchain script/generate_rom_image.py $(HEX) +$(INIT_HEX): $(CC65) script/generate_rom_image.py $(HEX) python script/generate_rom_image.py -i $(HEX) -o $@ $(HEX): diff --git a/hw/super6502_fpga/src/sub/sd_controller b/hw/super6502_fpga/src/sub/sd_controller index 091984c..91168dc 160000 --- a/hw/super6502_fpga/src/sub/sd_controller +++ b/hw/super6502_fpga/src/sub/sd_controller @@ -1 +1 @@ -Subproject commit 091984c3342f13cfbf50c63f1fead7febc49158e +Subproject commit 91168dcccad424c51217d3679111e51be1127e46 diff --git a/sw/test_code/sd_controller_test/main.s b/sw/test_code/sd_controller_test/main.s index b497f15..7b26964 100644 --- a/sw/test_code/sd_controller_test/main.s +++ b/sw/test_code/sd_controller_test/main.s @@ -8,8 +8,12 @@ SD_CONTROLLER = $e000 SD_ARG = SD_CONTROLLER + $4 +SD_RESP = SD_CONTROLLER + $10 CLK_DIV = $20 +.zeropage +rca: .res 4 + .code _nmi_int: @@ -28,5 +32,107 @@ _init: sta SD_ARG+3 lda #$08 sta SD_CONTROLLER + nop + nop + nop + + lda #55 + sta SD_CONTROLLER + lda #41 + sta SD_CONTROLLER + nop + nop + nop + +@acmd41: + lda #55 + sta SD_CONTROLLER + lda #$80 + sta SD_ARG+1 + lda #$ff + sta SD_ARG+2 + lda #$40 + sta SD_ARG+3 + lda #41 + sta SD_CONTROLLER + + nop + nop + nop + nop + nop + + lda SD_RESP+3 + bmi card_ready + + + ldx #$10 +@loop: dex + bne @loop + + bra @acmd41 + +card_ready: + lda #2 + sta SD_CONTROLLER + + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + + lda #3 + sta SD_CONTROLLER + + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + + lda SD_RESP + sta rca + lda SD_RESP+1 + sta rca+1 + lda SD_RESP+2 + sta rca+2 + lda SD_RESP+3 + sta rca+3 + + lda rca + sta SD_ARG + lda rca+1 + sta SD_ARG+1 + lda rca+2 + sta SD_ARG+2 + lda rca+3 + sta SD_ARG+3 + lda #7 + sta SD_CONTROLLER + + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + + lda #17 + sta SD_CONTROLLER @end: bra @end \ No newline at end of file