Fix uart status multiple drivers

hw/efinix_fpga/src/uart_wrapper.sv

@@ -48,13 +48,15 @@ always_ff @(posedge clk_50) begin
     if (reset) begin
         state <= READY;
         irqb <= '1;
-        status <= '0;
     end else begin
         state <= next_state;
     end
 end
 
 always_ff @(negedge clk) begin
+    if (reset) begin
+        status <= '0;
+    end else begin
         status[1] <= tx_busy | tx_en;
 
         status[0] <= status[0] | rx_data_valid;
@@ -73,6 +75,7 @@ always_ff @(negedge clk) begin
                 end
             endcase
         end
+    end
 
 end